SBOS998D June   2021  – July 2025 BUF802

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics Wide Bandwidth Mode
    6. 5.6 Electrical Characteristics Low Quiescent Current Mode
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and Output Overvoltage Clamp
      2. 7.3.2 Adjustable Quiescent Current
      3. 7.3.3 ESD Structure
    4. 7.4 Device Functional Modes
      1. 7.4.1 Buffer Mode (BF Mode)
      2. 7.4.2 Composite Loop Mode (CL Mode)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Oscilloscope Front-End Amplifier Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Transforming a Wide-Bandwidth, 50‑Ω Input Signal Chain to High-Input Impedance
        1. 8.2.2.1 Detailed Design Procedure
        2. 8.2.2.2 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.1 Layout Guidelines

Achieving optimized performance with the BUF802 requires careful attention to board layout, parasitics, and passive component selection. Consider the following:

  • Peaking in the S21 transfer function: keeping the trace length minimum is of prime importance to prevent peaking in the S21 transfer function of the BUF802. The trace inductance can form a resonant circuit with the input capacitance of the BUF802, causing peaking in the S21 response. Add a small resistor (R5 in Figure 8-10) in series with the dc blocking capacitor to dampen the LC resonance created by the trace inductance and the input capacitance of the BUF802. Choose series capacitors (C7 in Figure 8-10) with low equivalent series inductance (ESL) to minimize total inductance.
  • Power-supply bypass capacitors: mount the power-supply bypass capacitors as close to the supply pins as possible and on the same side of the PCB as the BUF802. As shown in Figure 8-10, choose low-inductance LICC capacitors (C5, C6, C13, and C10) to minimize high-frequency impedance between the BUF802 and the bypass capacitors. Use multiple vias between the bypass capacitor and GND to reduce series inductance. As shown in Figure 8-10, also use multiple vias to GND on the 50‑Ω input termination resistor (R3). Connect the bypass and termination vias to a solid GND plane.
  • High precision signal path: consisting of the precision op amp along with discrete components, the signal path can be adjusted and moved around to give precedence to the two previous points. In the Figure 8-12, the precision components are placed on the opposite side of the PCB as the BUF802.
  • Thermal pad: thermally conductive but electrically insulated to the die. This configuration gives the circuit designer flexibility in connecting the thermal pad to any voltage. Choose a power or ground plane with the highest thermal mass for effective heat dissipation.