Refer to the PDF data sheet for device specific package drawings
The device has a large number of interrupts to service the needs of its many peripherals and subsystems. The DSP (x2), and IPU, and EVE subsystems are capable of servicing these interrupts via their integrated interrupt controllers. In addition, each processor's interrupt controller is preceded by an Interrupt Controller Crossbar (IRQ_CROSSBAR) that provides flexibility in mapping the device interrupts to processor interrupt inputs.
For more information, see Interrupt Controllers section in the device TRM.