SLVSGH7B november   2022  – july 2023 DRV8410

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Diagrams
  9. 8 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 External Components
    4. 9.4 Feature Description
      1. 9.4.1 Bridge Control
        1. 9.4.1.1 Parallel Bridge Interface
      2. 9.4.2 Current Regulation
      3. 9.4.3 Protection Circuits
        1. 9.4.3.1 Overcurrent Protection (OCP)
        2. 9.4.3.2 Thermal Shutdown (TSD)
        3. 9.4.3.3 Undervoltage Lockout (UVLO)
    5. 9.5 Device Functional Modes
      1. 9.5.1 Active Mode
      2. 9.5.2 Low-Power Sleep Mode
      3. 9.5.3 Fault Mode
    6. 9.6 Pin Diagrams
      1. 9.6.1 Logic-Level Inputs
  11. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Typical Application
        1. 10.1.1.1 Stepper Motor Application
          1. 10.1.1.1.1 Design Requirements
          2. 10.1.1.1.2 Detailed Design Procedure
            1. 10.1.1.1.2.1 Stepper Motor Speed
            2. 10.1.1.1.2.2 Current Regulation
            3. 10.1.1.1.2.3 Stepping Modes
              1. 10.1.1.1.2.3.1 Full-Stepping Operation
              2. 10.1.1.1.2.3.2 Half-Stepping Operation with Fast Decay
              3. 10.1.1.1.2.3.3 Half-Stepping Operation with Slow Decay
          3. 10.1.1.1.3 Application Curves
        2. 10.1.1.2 Dual BDC Motor Application
          1. 10.1.1.2.1 Design Requirements
          2. 10.1.1.2.2 Detailed Design Procedure
            1. 10.1.1.2.2.1 Motor Voltage
            2. 10.1.1.2.2.2 Current Regulation
            3. 10.1.1.2.2.3 Sense Resistor
          3. 10.1.1.2.3 Application Curves
        3. 10.1.1.3 Thermal Considerations
          1. 10.1.1.3.1 Maximum Output Current
          2. 10.1.1.3.2 Power Dissipation
          3. 10.1.1.3.3 Thermal Performance
            1. 10.1.1.3.3.1 Steady-State Thermal Performance
            2. 10.1.1.3.3.2 Transient Thermal Performance
        4. 10.1.1.4 Multi-Sourcing with Standard Motor Driver Pinout
  12. 11Power Supply Recommendations
    1. 11.1 Bulk Capacitance
    2. 11.2 Power Supply and Logic Sequencing
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|16
  • RTE|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

1.65 V ≤ VVM ≤ 11 V, –40°C ≤ TJ ≤ 150°C (unless otherwise noted). Typical values are at TJ = 27 °C and VVM = 5 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES (VM)
IVMQ VM sleep mode current nSLEEP = 0 V, VVM = 5 V, TJ = 27°C 4 30 nA
IVM VM active mode current xIN1 = 3.3 V, xIN2 = 0 V, VVM = 5 V 1.3 2.5 mA
tWAKE Turnon time Sleep mode to active mode delay 100 μs
tSLEEP Turnoff time Active mode to sleep mode delay 5 μs
LOGIC-LEVEL INPUTS (nSLEEP, AIN1, AIN2, BIN1, BIN2)
VIL Input logic low voltage 0 0.4 V
VIH Input logic high voltage 1.45 5.5 V
VHYS_nSLEEP nSLEEP Input hysteresis 100 mV
VHYS_logic Logic Input hysteresis (except nSLEEP) 50 mV
IIL Input logic low current VxINx = 0 V -1 1 µA
IIH,nSLEEP Input logic high current VnSLEEP = 5 V 14 µA
IIH Input logic high current VxINx = 5 V 20 70 µA
RPD,nSLEEP Input pulldown resistance 500 kΩ
RPD Input pulldown resistance 100 kΩ
tDEGLITCH Input logic deglitch 50 ns
OPEN-DRAIN OUTPUTS (nFAULT)
VOL Output logic low voltage IOD = 5 mA 0.3 V
IOZ Output logic high current VOD = 5 V -1 1 µA
DRIVER OUTPUTS (AOUT1, AOUT2, BOUT1, BOUT2)
RHS_DS(ON) High-side MOSFET on resistance IOUTx = 0.2 A 400 mΩ
RLS_DS(ON) Low-side MOSFET on resistance IOUTx = -0.2 A 400 mΩ
VSD Body diode forward voltage IOUTx = -0.5 A 1 V
tRISE Output rise time VOUTx rising from 10% to 90% of VVM, VVM = 5 V 100 ns
tFALL Output fall time VOUTx falling from 90% to 10% of VVM, VVM = 5 V 50 ns
tPD Input to output propagation delay Input crosses 0.8 V to VOUTx = 0.1×VVM, IOUTx = 1 A 600 ns
tDEAD Output dead time 400 ns
CURRENT REGULATION (AISEN, BISEN)
VTRIP xISEN trip voltage 180 200 230 mV
tOFF Current regulation off time 20 µs
tBLANK Current regulation blanking time 1.8 µs
tDEG Current regulation deglitch time 1 µs
PROTECTION CIRCUITS
VUVLO Supply undervoltage lockout (UVLO) Supply rising 1.6 V
Supply falling 1.3 V
VUVLO_HYS Supply UVLO hysteresis Rising to falling threshold 100 mV
tUVLO Supply undervoltage deglitch time VVM falling to OUTx disabled 10 µs
IOCP Overcurrent protection trip point 2.5 A
VOCP_ISEN Overcurrent protection trip point on ISEN pin 0.6 V
tOCP Overcurrent protection deglitch time 4.2 µs
tRETRY Overcurrent protection retry time 1.6 ms
TTSD Thermal shutdown temperature 153 193 °C
THYS Thermal shutdown hysteresis 18 °C