SNVSAL1C December 2017 – June 2021 LP87702-Q1
Section 9.2 shows the input capacitors CIN0 and CIN1. A ceramic input bypass capacitor of 10 μF is required for both converters. Place the input capacitor as close as possible to the device's VIN_Bx pin and PGND_Bx pin. A larger value or higher voltage rating improves the input voltage filtering. Use X7R type of capacitors, not Y5V or F. The capacitor's DC bias characteristics must also be considered. Minimum effective input capacitance to ensure good performance is 1.9 μF per buck input at the maximum input voltage including tolerances and ambient temperature range. In addition, Table 9-4 shows how there must be at least 22 μF of additional capacitance common for all the power input pins on the system power rail.
The input filter capacitor supplies current to the high-side FET switch in the first half of each cycle and reduces the voltage ripple imposed on the input power source. A ceramic capacitor's low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing current. Select an input filter capacitor with sufficient ripple current rating. In addition, ferrite can be used in front of the input capacitor to reduce the EMI.
|MANUFACTURER||PART NUMBER||VALUE||CASE SIZE||DIMENSIONS LxWxH (mm)||VOLTAGE RATING|
|Murata||GCM21BR71A106KE22||10 µF (10%)||0805||2 × 1.25 × 1.25||10 V|
|TDK||CGA4J3X7S1A106K125AB||10 µF (10%)||0805||2 × 1.25 × 1.25||10 V|