SBASA91 December   2020 TLV320ADC3120

ADVANCE INFORMATION  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements: I2C Interface
    7. 7.7  Switching Characteristics: I2C Interface
    8. 7.8  Timing Requirements: TDM, I2S or LJ Interface
    9. 7.9  Switching Characteristics: TDM, I2S or LJ Interface
    10. 7.10 Timing Requirements: PDM Digital Microphone Interface
    11. 7.11 Switching Characteristics: PDM Digial Microphone Interface
    12. 7.12 Timing Diagrams
    13. 7.13 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial Interfaces
        1. 8.3.1.1 Control Serial Interfaces
        2. 8.3.1.2 Audio Serial Interfaces
          1. 8.3.1.2.1 Time Division Multiplexed Audio (TDM) Interface
          2. 8.3.1.2.2 Inter IC Sound (I2S) Interface
          3. 8.3.1.2.3 Left-Justified (LJ) Interface
        3. 8.3.1.3 Using Multiple Devices With Shared Buses
      2. 8.3.2 Phase-Locked Loop (PLL) and Clock Generation
      3. 8.3.3 Input Channel Configurations
      4. 8.3.4 Reference Voltage
      5. 8.3.5 Programmable Microphone Bias
      6. 8.3.6 Signal-Chain Processing
        1. 8.3.6.1 Programmable Channel Gain and Digital Volume Control
        2. 8.3.6.2 Programmable Channel Gain Calibration
        3. 8.3.6.3 Programmable Channel Phase Calibration
        4. 8.3.6.4 Programmable Digital High-Pass Filter
        5. 8.3.6.5 Programmable Digital Biquad Filters
        6. 8.3.6.6 Programmable Channel Summer and Digital Mixer
        7. 8.3.6.7 Configurable Digital Decimation Filters
          1. 8.3.6.7.1 Linear Phase Filters
            1. 8.3.6.7.1.1 Sampling Rate: 8 kHz or 7.35 kHz
            2. 8.3.6.7.1.2 Sampling Rate: 16 kHz or 14.7 kHz
            3. 8.3.6.7.1.3 Sampling Rate: 24 kHz or 22.05 kHz
            4. 8.3.6.7.1.4 Sampling Rate: 32 kHz or 29.4 kHz
            5. 8.3.6.7.1.5 Sampling Rate: 48 kHz or 44.1 kHz
            6. 8.3.6.7.1.6 Sampling Rate: 96 kHz or 88.2 kHz
            7. 8.3.6.7.1.7 Sampling Rate: 192 kHz or 176.4 kHz
            8. 8.3.6.7.1.8 Sampling Rate: 384 kHz or 352.8 kHz
            9. 8.3.6.7.1.9 Sampling Rate 768 kHz or 705.6 kHz
          2. 8.3.6.7.2 Low-Latency Filters
            1. 8.3.6.7.2.1 Sampling Rate: 16 kHz or 14.7 kHz
            2. 8.3.6.7.2.2 Sampling Rate: 24 kHz or 22.05 kHz
            3. 8.3.6.7.2.3 Sampling Rate: 32 kHz or 29.4 kHz
            4. 8.3.6.7.2.4 Sampling Rate: 48 kHz or 44.1 kHz
            5. 8.3.6.7.2.5 Sampling Rate: 96 kHz or 88.2 kHz
            6. 8.3.6.7.2.6 Sampling Rate 192 kHz or 176.4 kHz
          3. 8.3.6.7.3 Ultra-Low Latency Filters
            1. 8.3.6.7.3.1 Sampling Rate: 16 kHz or 14.7 kHz
            2. 8.3.6.7.3.2 Sampling Rate: 24 kHz or 22.05 kHz
            3. 8.3.6.7.3.3 Sampling Rate: 32 kHz or 29.4 kHz
            4. 8.3.6.7.3.4 Sampling Rate: 48 kHz or 44.1 kHz
            5. 8.3.6.7.3.5 Sampling Rate: 96 kHz or 88.2 kHz
            6. 8.3.6.7.3.6 Sampling Rate 192 kHz or 176.4 kHz
            7. 8.3.6.7.3.7 Sampling Rate 384 kHz or 352.8 kHz
      7. 8.3.7 Automatic Gain Controller (AGC)
      8. 8.3.8 Digital PDM Microphone Record Channel
      9. 8.3.9 Interrupts, Status, and Digital I/O Pin Multiplexing
    4. 8.4 Device Functional Modes
      1. 8.4.1 Sleep Mode or Software Shutdown
      2. 8.4.2 Active Mode
      3. 8.4.3 Software Reset
    5. 8.5 Programming
      1. 8.5.1 Control Serial Interfaces
        1. 8.5.1.1 I2C Control Interface
          1. 8.5.1.1.1 General I2C Operation
          2. 8.5.1.1.2 I2C Single-Byte and Multiple-Byte Transfers
            1. 8.5.1.1.2.1 I2C Single-Byte Write
            2. 8.5.1.1.2.2 I2C Multiple-Byte Write
            3. 8.5.1.1.2.3 I2C Single-Byte Read
            4. 8.5.1.1.2.4 I2C Multiple-Byte Read
    6. 8.6 Register Maps
      1. 8.6.1 Device Configuration Registers
        1. 8.6.1.1 TLV320ADC3120 Access Codes
      2. 8.6.2 Page 0 Registers
      3. 8.6.3 Page 1 Registers
      4. 8.6.4 Programmable Coefficient Registers
        1. 8.6.4.1 Programmable Coefficient Registers: Page 2
        2. 8.6.4.2 Programmable Coefficient Registers: Page 3
        3. 8.6.4.3 Programmable Coefficient Registers: Page 4
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Two-Channel Analog Microphone Recording
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Example Device Register Configuration Script for EVM Setup
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Four-Channel Digital PDM Microphone Recording
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Example Device Register Configuration Script for EVM Setup
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Automatic Gain Controller (AGC)

The device includes an automatic gain controller (AGC) for ADC recording. As shown in Figure 8-63, the AGC can be used to maintain a nominally constant output level when recording speech. Instead of manually setting the channel gain in AGC mode, the circuitry automatically adjusts the channel gain when the input signal becomes overly loud or very weak, such as when a person speaking into a microphone moves closer to or farther from the microphone. The AGC algorithm has several programmable parameters, including target level, maximum gain allowed, attack and release (or decay) time constants, and noise thresholds that allow the algorithm to be fine-tuned for any particular application.

GUID-278960F3-B360-429D-850A-F843519C446D-low.gifFigure 8-63 AGC Characteristics

The target level (AGC_LVL) represents the nominal approximate output level at which the AGC attempts to hold the ADC output signal level. The TLV320ADC3120 allows programming of different target levels, which can be programmed from –6 dB to –36 dB relative to a full-scale signal, and the AGC_LVL default value is set to –34 dB. The target level is recommended to be set with enough margin to prevent clipping when loud sounds occur. Table 8-44 lists the AGC target level configuration settings.

Table 8-44 AGC Target Level Programmable Settings
P0_R112_D[7:4] : AGC_LVL[3:0] AGC TARGET LEVEL FOR OUTPUT
0000 The AGC target level is the –6-dB output signal level
0001 The AGC target level is the –8-dB output signal level
0010 The AGC target level is the –10-dB output signal level
1110 (default) The AGC target level is the –34-dB output signal level
1111 The AGC target level is the –36-dB output signal level

The maximum gain allowed (AGC_MAXGAIN) gives flexibility to the designer to restrict the maximum gain applied by the AGC. This feature limits the channel gain in situations where environmental noise is greater than the programmed noise threshold. The AGC_MAXGAIN can be programmed from 3 dB to 42 dB with steps of 3 dB and the default value is set to 24 dB. Table 8-45 lists the AGC_MAXGAIN configuration settings.

Table 8-45 AGC Maximum Gain Programmable Settings
P0_R112_D[3:0] : AGC_MAXGAIN[3:0] AGC MAXIMUM GAIN ALLOWED
0000 The AGC maximum gain allowed is 3 dB
0001 The AGC maximum gain allowed is 6 dB
0010 The AGC maximum gain allowed is 9 dB
0111 (default) The AGC maximum gain allowed is 24 dB
1110 The AGC maximum gain allowed is 39 dB
1111 The AGC maximum gain allowed is 42 dB

For further details on the AGC various configurable parameter and application use, see the Using the Automatic Gain Controller (AGC) in TLV320ADCx140 application report.