SNIS214E june 2021 – july 2023 TMP114
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
A bus with both I3C and I2C interfaces is referred to as a mixed with clock speeds up to 12.5 MHz. The TMP114 is an I2C device that can be on the same bus that has an I3C device attached as the TMP114 incorporates a spike suppression filter of 50 ns on the SDA and SCL pins to avoid any interference to the bus when communicating with I3C devices.