SNIS214E june 2021 – july 2023 TMP114
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The TMP114 supports the ability to check data integrity with an 8-bit CRC value for every transaction. By setting the CRC_Enable bit to 1b in the Configuration Register, the device will use CRC to validate any write transactions. During a CRC enabled write transaction, the TMP114 will check the Target Address, Control Register, MSB, and LSB of data against the CRC value. After the first CRC byte, each subsequent MSB and LSB of data sent to the TMP114 will have its own CRC byte for validation. If the first CRC byte fails, the TMP114 will discard the entire write transaction. If the first CRC passes, the TMP114 will only discard data if the associated CRC checksum fails. For example, consider the case where a controller tries to write values to registers 03h, 04h, and 05h. If the first and third CRC values are valid but the second CRC value is incorrect, the TMP114 will shift the 03h and 05h values into the registers and discard the 04h values. Figure 8-13shows an overview of a write transaction with CRC.
If the TMP114 determines the CRC failed, it will NACK on the CRC byte and the CRC_Flag bit in the Alert status register will be set. If the CRC byte is not included the TMP114 will interpret this as an incomplete transaction and discard the write contents and the status flag will not be set. Multiple writes to the same register in a single transaction with Auto-Increment set to 0b and CRC enabled is not supported.