SNIS214E june   2021  – july 2023 TMP114

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 1.2 V Compatible Logic Inputs
      2. 8.3.2 Cyclic Redundancy Check (CRC)
      3. 8.3.3 Temperature Limits
      4. 8.3.4 Slew Rate Warning
      5. 8.3.5 NIST Traceability
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous Conversion Mode
      2. 8.4.2 Shutdown Mode
        1. 8.4.2.1 One-Shot Temperature Conversions
    5. 8.5 Programming
      1. 8.5.1 Temperature Data Format
      2. 8.5.2 I2C and SMBus Interface
      3. 8.5.3 Device Address
      4. 8.5.4 Bus Transactions
        1. 8.5.4.1 Auto-Increment
        2. 8.5.4.2 Writes
          1. 8.5.4.2.1 CRC Enabled Writes
        3. 8.5.4.3 Reads
          1. 8.5.4.3.1 CRC Enabled Reads
        4. 8.5.4.4 General Call Reset Function
        5. 8.5.4.5 Time-Out Function
        6. 8.5.4.6 Coexist on I3C MixedBus
        7. 8.5.4.7 Cyclic Redundancy Check Implementation
    6. 8.6 Register Map
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Separate I2C Pullup and Supply Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Equal I2C Pullup and Supply Voltage Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YMT|4
Thermal pad, mechanical data (Package|Pins)
Orderable Information
8.5.4.3.1 CRC Enabled Reads

The TMP114 supports the ability to check data integrity with an 8-bit CRC value for every read transaction. By setting the CRC_Enable bit to 1b in the Configuration Register, the device will use CRC to validate any read transactions. During a CRC enabled read, the TMP114 will check the Target Address and Control Register against the CRC value sent by the controller. The second CRC byte, after the restart, will be sent by the TMP114 and will check the Target Address, MSB, and LSB from the first register. All subsequent MSB and LSB bytes of data sent from the TMP114 will have their own CRC values. Figure 8-17shows an overview of a read transaction with CRC.

If the TMP114 determines the CRC failed, it will NACK on the CRC byte and the CRC_Flag bit in the Alert status register will be set. The TMP114 will NACK after the restart to its target address and send FFh if the controller continues clocking the SCL line until a STOP condition is sent and a new transaction started.

GUID-20210113-CA0I-TPSK-RD2V-XC21K0QCDF6S-low.svg Figure 8-17 CRC Enabled Read