SNIS241 September 2025 TMP461-EP
PRODUCTION DATA
The TMP461-EP device is SMBus-interface-compatible. In the SMBus protocol, the device that initiates the transfer is called a controller, and the devices controlled by the controller are targets. The bus must be controlled by a controller device that generates the serial clock (SCL), controls the bus access, and generates the start and stop conditions.
To address a specific device, a start condition is initiated. A start condition is indicated by pulling the data line (SDA) from a high-to-low logic level when SCL is high. All targets on the bus shift in the target address byte, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the target being addressed responds to the controller by generating an acknowledge bit and pulling SDA low.
Data transfer is then initiated and sent over eight clock pulses, followed by an acknowledge bit. During data transfer, SDA must remain stable when SCL is high. A change in SDA when SCL is high is interpreted as a control signal.
After all data is transferred, the controller generates a stop condition. A stop condition is indicated by pulling SDA from low to high when SCL is high.