SNIS241 September 2025 TMP461-EP
PRODUCTION DATA
Operation of the ALERT (pin 10) and THERM (pin 7) interrupts is shown in Figure 7-4. Operation of the THERM (pin 7) and THERM2 (pin 10) interrupts is shown in Figure 7-5. The ALERT and THERM pin setting is determined by bit 5 of the configuration register.
The hysteresis value is stored in the THERM hysteresis register and applies to both the THERM and THERM2 interrupts. The value of the CONAL[2:0] bits in the consecutive ALERT register (see Table 8-1) determines the number of limit violations before the ALERT pin is tripped. The default value is 000b and corresponds to one violation, 001b programs two consecutive violations, 011b programs three consecutive violations, and 111b programs four consecutive violations. The CONAL[2:0] bits provide additional filtering for the ALERT pin state.
