SLUSBX9I March   2014  – July 2019 TPS23861


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Detailed Pin Description
      2. 7.1.2 I2C Detailed Pin Description
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Detection Resistance Measurement
      2. 7.3.2  Physical Layer Classification
      3. 7.3.3  Class and Detect Fields
      4. 7.3.4  Register State Following a Fault
      5. 7.3.5  Disconnect
      6. 7.3.6  Disconnect Threshold
      7. 7.3.7  Fast Shutdown Mode
      8. 7.3.8  Legacy Device Detection
      9. 7.3.9  VPWR Undervoltage and UVLO Events
      10. 7.3.10 Timer-Deferrable Interrupt Support
      11. 7.3.11 A/D Converter and I2C Interface
      12. 7.3.12 Independent Operation when the AUTO Bit is Set
      13. 7.3.13 I2C Slave Address and AUTO Bit Programming
    4. 7.4 Device Functional Modes
      1. 7.4.1 Off
      2. 7.4.2 Manual
      3. 7.4.3 Semi-Auto
      4. 7.4.4 Auto
      5. 7.4.5 Push-Button Power On Response
      6. 7.4.6 TSTART Indicators of Detect and Class Failures
      7. 7.4.7 Device Power On Initialization
    5. 7.5 Register Map – I2C-Addressable
      1. 7.5.1  Interrupt Register
      2. 7.5.2  Interrupt Enable Register
      3. 7.5.3  Power Event Register
      4. 7.5.4  Detection Event Register
      5. 7.5.5  Fault Event Register
      6. 7.5.6  Start/ILIM Event Register
      7. 7.5.7  Supply Event Register
      8. 7.5.8  Port n Status Register
        1. Port 1 Status Register
        2. Port 2 Status Register
        3. Port 3 Status Register
        4. Port 4 Status Register
      9. 7.5.9  Power Status Register
      10. 7.5.10 I2C Slave Address Register
      11. 7.5.11 Operating Mode Register
      12. 7.5.12 Disconnect Enable Register
      13. 7.5.13 Detect/Class Enable Register
      14. 7.5.14 Port Power Priority Register
      15. 7.5.15 Timing Configuration Register
      16. 7.5.16 General Mask 1 Register
      17. 7.5.17 Detect/Class Restart Register
      18. 7.5.18 Power Enable Register
      19. 7.5.19 Reset Register
      20. 7.5.20 Legacy Detect Mode Register
      21. 7.5.21 Two-Event Classification Register
      22. 7.5.22 Interrupt Timer Register
      23. 7.5.23 Disconnect Threshold Register
        1. Bits Description
      24. 7.5.24 ICUTnm CONFIG Register
        1. ICUT21 CONFIG Register
        2. ICUT43 CONFIG Register
        3. Bits Description
      25. 7.5.25 Temperature Register
      26. 7.5.26 Input Voltage Register
      27. 7.5.27 Port n Current Register
        1. Port 1 Current Register
        2. Port 2 Current Register
        3. Port 3 Current Register
        4. Port 4 Current Register
      28. 7.5.28 Port n Voltage Register
        1. Port 1 Voltage Register
        2. Port 2 Voltage Register
        3. Port 3 Voltage Register
        4. Port 4 Voltage Register
      29. 7.5.29 PoE Plus Register
      30. 7.5.30 Firmware Revision Register
      31. 7.5.31 I2C Watchdog Register
      32. 7.5.32 Device ID Register
      33. 7.5.33 Cool Down/Gate Drive Register
      34. 7.5.34 Port n Detect Resistance Register
        1. Port 1 Detect Resistance Register
          1. Port 2 Detect Resistance Register
          2. Port 3 Detect Resistance Register
          3. Port 4 Detect Resistance Register
      35. 7.5.35 Port n Detect Voltage Difference Register
        1. Port 1 Detect Voltage Difference Register
        2. Port 2 Detect Voltage Difference Register
        3. Port 3 Detect Voltage Difference Register
        4. Port 4 Detect Voltage Difference Register
      36. 7.5.36 Reserved Registers
  8. Application and Implementation
    1. 8.1 Introduction to PoE
    2. 8.2 Application Information
      1. 8.2.1 Kelvin Current Sensing Resistor
      2. 8.2.2 Connections on Unused Ports
    3. 8.3 Typical Application
      1. 8.3.1 Two Port, Auto Mode Application with External Port Reset
        1. Design Requirements
      2. 8.3.2 Four Port, Auto Mode Application
        1. Design Requirements
      3. 8.3.3 Eight Port, Semi-Auto Mode Application Using MSP430 Micro-Controller
        1. Design Requirements
      4. 8.3.4 Detailed Design Procedure
        1. Power Pin Bypass Capacitors
        2. Per Port Components
        3. System Level Components (not shown in the schematic diagrams)
      5. 8.3.5 Application Curves
    4. 8.4 System Examples
      1. 8.4.1 Overcurrent and Overload Protection
      2. 8.4.2 Inrush Protection
      3. 8.4.3 ICUT Current Limit
      4. 8.4.4 Foldback Protection (ILIM)
      5. 8.4.5 Kelvin Current Sensing Resistor
  9. Power Supply Recommendations
    1. 9.1 VDD
    2. 9.2 VPWR
    3. 9.3 VPWR-RESET Sequencing
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Port Current Kelvin Sensing
    2. 10.2 Layout Example
      1. 10.2.1 Component Placement and Routing Guidelines
        1. Power Pin Bypass Capacitors
        2. Per-Port Components
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Pin Description

The following descriptions refer to the pinout and the functional block diagram.

DRAIN1-DRAIN4: Port 1-4 output voltage monitor and detect sense. Used to measure the port output voltage, for port voltage monitoring, port-power-good detection and foldback action. Detection probe currents also flow into this pin. The TPS23861 uses an innovative 4-point technique in order to provide a reliable PD detection. Detection is performed by sinking two different current levels via the DRAINn pin, while the PD voltage is measured from VPWR to DRAINn. The 4-point measurement provides the capability to distinguish between an IEEE-standard-compliant PD and a capacitive or legacy load. If the Port n is not used, DRAINn can be left floating or tied to AGND.

GATE1-GATE4: Port 1-4 gate drive output used for external N-channel MOSFET gate control. At port turn on, it is driven positive by a low-current source to turn the MOSFET on. GATEn is pulled low whenever any of the input supplies are low or if an over-current timeout has occurred. GATEn will also be pulled low if its port is turned off during fast shutdown. Leave floating if unused. For a robust design, a current-foldback function limits the power dissipation of the MOSFET during low resistance load or a short-circuit event. The foldback mechanism measures the port voltage across AGND and DRAINn to reduce the current-limit threshold as shown in Figure 14, Figure 57, and Figure 58. The fast overload protection is for major faults like a direct short. This forces down the current within the current limit in less than a microsecond. When ICUT threshold is exceeded while a port is on, a timer starts. During that time, linear current limiting makes sure the current will not exceed ILIM combined with current-foldback action. When the timer reaches its tOVLD (or tSTART if at port turn on) limit, the port shuts off. When the port current goes below ICUT , the counter counts down at a rate 1/16th of the increment rate, and it must reach a count of zero before the port can be turned on again.

KSENSA, KSENSB: Kelvin point connection used to perform a differential voltage measurement across the associated current sense resistors. KSENSA is shared between SEN1 and SEN2, while KSENSB is shared between SEN3 and SEN4. In order to optimize the accuracy of the measurement, the PCB layout (see Figure 61) must be done carefully to minimize impact of PCB trace resistance.

SHTDWN: Shutdown, active low. This pin is internally pulled up to VDD, with internal 1-µs to 5-µs deglitch filter. The Port Power Priority register is used to determine which port(s) is (are) shut down in response to an external assertion of the SHTDWN pin. The turn-off procedure is similar to a port reset or a reset command (Reset register).


After a SHTDWN cycle occurs, the I2C host should reinitialize the TPS23861 register set according to the desired user configuration. More detail regarding use of the SHTDWN pin to power off low priority ports can be obtained by consulting a Texas Instruments technical representative.

RESET: Reset input, active low. When asserted, the TPS23861 resets, turning off all ports and forcing the registers to their power-up state. This pin is internally pulled up to VDD, with internal 1-µs to 5-µs deglitch filter. External RC network can be used to delay the turn-on. There is also an internal power-on-reset which is independent of the RESET input.


After RESET pin de-assertion, there is a delay of approximately 20 ms before TPS23861 can process I2C commands. For more information, refer to the application note TPS23861 Power-On Considerations, SLVA723.

SEN1- SEN4: Port 1-2 current sense input relative to KSENSA, and port 3-4 current sense relative to KSENSB. A differential measurement is performed using KSENSA and KSENSB Kelvin point connection. It monitors the external MOSFET current by use of either a 255-mΩ (two 510 mΩ in parallel) or a 250-mΩ (four 1 Ω in parallel) current-sense resistors connected to AGND. Used by current foldback engine and also during classification. Can be used to perform load current monitoring via A/D conversion.


A classification is done while using the external MOSFET so performing a classification on more than one port at the same time is possible without exceeding dissipation in the TPS23861.

For the current limit with foldback function, there is an internal 2-µs analog filter on the SEN1-4 pins to provide glitch filtering. For measurements through an A/D converter, an anti-aliasing filter is present on the SEN1-4 pins. This includes the port-powered current monitoring and disconnect. If the port is not used, tie SENn to AGND.

VDD: 3.3-V logic power supply input.

VPWR: High-voltage power supply input. Nominally 48 V.