JAJSIU8B June 2015 – April 2020 ADS131E08S
The ADS131E08S input multiplexers are very flexible and provide many configurable signal-switching options. Figure 17 shows a diagram of the multiplexer on a single channel of the device. INxP and INxN are separate for each of the eight blocks. This flexibility allows for significant device and sub-system diagnostics, calibration, and configuration. Switch settings for each channel are selected by writing the appropriate values to the CHnSET registers (see the CHnSET registers in the Register Map section for details). The output of each multiplexer is connected to the individual channel PGA.