SBAU315B July   2018  – March 2025 ADS9224R , ADS9234R

 

  1.   1
  2.   ADS9224REVM-PDK
  3.   Trademarks
  4. 1Overview
    1. 1.1 ADS9224REVM-PDK Features
    2. 1.2 ADS9224REVM Features
  5. 2Analog Interface
    1. 2.1 Connectors for Signal Source
    2. 2.2 ADC Differential Input Signal Driver
      1. 2.2.1 Input Signal Path
    3. 2.3 ADS9224R Internal Reference
  6. 3Digital Interfaces
    1. 3.1 multiSPI for ADC Digital IO
  7. 4Power Supplies
  8. 5Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface (GUI) Software Installation
  9. 6Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Register Map Configuration Tool
    3. 6.3 Time Domain Display Tool
    4. 6.4 Spectral Analysis Tool
    5. 6.5 Histogram Tool
  10. 7ADS9224REVM Bill of Materials, PCB Layout, and Schematics
    1. 7.1 Bill of Materials
    2. 7.2 PCB Layout
    3. 7.3 Schematics
  11. 8Revision History

Default Jumper Settings

JP1-JP2 and JP3-JP4 are used to connect differential analog sources to channel A and channel B inputs, respectively. In addition, shunts can be used on jumpers JP1 and JP4 to ground the negative inputs and support single-ended signals, as described in Section 2.1.

. Figure 5-1 shows the default factory jumper locations and settings.

 ADS9224REVM-PDK Jumper LocationsFigure 5-1 ADS9224REVM-PDK Jumper Locations

Table 5-1 explains the functionality of each of these jumpers and their default configurations.

Table 5-1 Default Jumper Configurations
Designator Default Configuration Description
JP1 Open CHA negative differential input. This pin can be grounded by shunting JP1 pin 1 and JP1 pin 2 for single-ended signals.
JP2 Open CHA positive differential input or input for single-ended signals.
JP3 Open CHB negative differential input. This pin can be grounded by shunting JP1 pin 1 and JP1 pin 2 for single-ended signals.
JP4 Open CHB positive differential input or input for single-ended signals.
JP5 Open EEPROM write protect function (EEPROM rewrite disabled).
JP6 Open External CONVST is disconnected.
JP7 Installed Shutdown pin on U8 LDO is disabled.
JP8 1-2 Negative supply for fully-differential input amplifiers is connected to –230 mV.