SBOS790A April 2017 – March 2025 INA233
PRODUCTION DATA
When SMBus alerts are latched, the INA233 is designed to respond to the SMBus alert response address. The SMBus alert response provides a quick fault identification for simple target devices. When an alert occurs, the controller can broadcast the alert response target address (0001 100) with the R/ W bit set high. Following this alert response, any target device that generates an alert is identified by acknowledging the alert response and sending the address on the bus.
The alert response can activate several different target devices simultaneously, similar to the I2C general call. If more than one target attempts to respond, bus arbitration rules apply and the device with the lowest address wins and is serviced first. The losing devices do not generate an Acknowledge and continue to hold the alert line low until the interrupt is cleared. The winning device responds with the address and releases the SMBus alert line. Even though the INA233 releases the SMBus line, the internal error flags are not cleared until the host clears the flags.