SBOS790A April 2017 – March 2025 INA233
PRODUCTION DATA
To communicate with the INA233, the controller must first address target devices via a target address byte. The target address byte consists of seven address bits and a direction bit that indicates whether the action is to be a read or write operation.
The device has two address pins, A0 and A1. Table 6-2 lists the pin logic levels for each of the 16 possible addresses. The device samples the state of the A0 and A1 pins on every bus communication. Establish the pin states before any activity on the interface occurs.
| A1 | A0 | TARGET ADDRESS |
|---|---|---|
| GND | GND | 1000000 |
| GND | VS | 1000001 |
| GND | SDA | 1000010 |
| GND | SCL | 1000011 |
| VS | GND | 1000100 |
| VS | VS | 1000101 |
| VS | SDA | 1000110 |
| VS | SCL | 1000111 |
| SDA | GND | 1001000 |
| SDA | VS | 1001001 |
| SDA | SDA | 1001010 |
| SDA | SCL | 1001011 |
| SCL | GND | 1001100 |
| SCL | VS | 1001101 |
| SCL | SDA | 1001110 |
| SCL | SCL | 1001111 |