SBOU024C august   2004  – july 2023 PGA309

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Related Documentation from Texas Instruments
    3.     If You Need Assistance
    4.     Information About Cautions and Warnings
    5.     FCC Warning
    6.     Trademarks
  3. 1Introduction
    1. 1.1  PGA309 Functional Description
    2. 1.2  Sensor Error Adjustment Range
    3. 1.3  Gain Scaling
    4. 1.4  Offset Adjustment
    5. 1.5  Voltage Reference
    6. 1.6  Sensor Excitation and Linearization
    7. 1.7  ADC for Temperature Sensing
    8. 1.8  External EEPROM and Temperature Coefficients
    9. 1.9  Fault Monitor
    10. 1.10 Over-Scale and Under-Scale Limits
    11. 1.11 Power-Up and Normal Operation
    12. 1.12 Digital Interface
    13. 1.13 Pin Configuration
  4. 2Detailed Description
    1. 2.1  Gain Scaling
      1. 2.1.1 PGA309 Transfer Function
      2. 2.1.2 Solving For Gain Settings
    2. 2.2  Offset Scaling
    3. 2.3  Zero DAC and Gain DAC Architecture
    4. 2.4  Output Amplifier
    5. 2.5  Reference Voltage
    6. 2.6  Linearization Function
      1. 2.6.1 System Definitions
      2. 2.6.2 Key Linearization Design Equations
        1. 2.6.2.1 Lin DAC Counts Conversion
      3. 2.6.3 Key Ideal Design Equations
        1. 2.6.3.1 Linearization Design
        2.       37
    7. 2.7  Temperature Measurement
      1. 2.7.1 Temp ADC Start-Convert Control
      2. 2.7.2 External Temperature Sensing with an Excitation Series Resistor
    8. 2.8  Fault Monitor
    9. 2.9  Over-Scale and Under-Scale
      1. 2.9.1 Over-Scale and Under-Scale Calculation
      2.      44
    10. 2.10 Noise and Coarse Offset Adjust
    11. 2.11 General AC Considerations
  5. 3Operating Modes
    1. 3.1 Power-On Sequence and Normal Stand-Alone Operation
    2. 3.2 EEPROM Content and Temperature Lookup Table Calculation
      1. 3.2.1 Temperature Lookup Table Calculation
        1. 3.2.1.1 Temperature Lookup Table Calculation
        2.       52
        3.       53
    3. 3.3 Checksum Error Event
    4. 3.4 Test Pin
    5. 3.5 Power-On Initial Register States
      1. 3.5.1 PGA309 Power-Up State
  6. 4Digital Interface
    1. 4.1  Description
    2. 4.2  Two-Wire Interface
      1. 4.2.1 Device Addressing
      2. 4.2.2 Two-Wire Access to PGA309
    3. 4.3  One-Wire Interface
    4. 4.4  One-Wire Interface Timeout
    5. 4.5  One-Wire Interface Timing Considerations
    6. 4.6  Two-Wire Access to External EEPROM
    7. 4.7  One-Wire Interface Initiated Two-Wire EEPROM Transactions
    8. 4.8  PGA309 Stand-Alone Mode and Two-Wire Transactions
    9. 4.9  PGA309 Two-Wire Bus Master Operation and Bus Sharing Considerations
    10. 4.10 One-Wire Operation with PRG Connected to VOUT
    11. 4.11 Four-Wire Modules and One-Wire Interface (PRG)
  7. 5Application Background
    1. 5.1 Bridge Sensors
    2. 5.2 System Scaling Options for Bridge Sensors
      1. 5.2.1 Absolute Scale
      2. 5.2.2 Ratiometric Scale
    3. 5.3 Trimming Real World Bridge Sensors for Linearity
    4. 5.4 PGA309 Calibration Procedure
  8. 6Register Descriptions
    1. 6.1 Internal Register Overview
    2. 6.2 Internal Register Map
      1. 6.2.1 Register 0: Temp ADC Output Register (Read Only, Address Pointer = 00000)
      2. 6.2.2 Register 1: Fine Offset Adjust (Zero DAC) Register (Read/Write, Address Pointer = 00001)
      3. 6.2.3 Register 2: Fine Gain Adjust (Gain DAC) Register (Read/Write, Address Pointer = 00010)
      4. 6.2.4 Register 3: Reference Control and Linearization Register (Read/Write, Address Pointer = 00011)
      5. 6.2.5 Register 4: PGA Coarse Offset Adjust and Gain Select/Output Amplifier Gain Select Register (Read/Write, Address Pointer = 00100)
      6. 6.2.6 Register 5: PGA Configuration and Over/Under-Scale Limit Register (Read/Write, Address Pointer = 00101)
      7. 6.2.7 Register 6: Temp ADC Control Register (Read/Write, Address Pointer = 00110)
      8. 6.2.8 Register 7: Output Enable Counter Control Register (Read/Write, Address Pointer = 00111)
      9. 6.2.9 Register 8: Alarm Status Register (Read Only, Address Pointer = 01000)
  9.   A External EEPROM Example
    1.     A.1 PGA309 External EEPROM Example
      1.      A.1.1 Gain and Offset Scaling for External EEPROM
      2.      94
  10.   B Detailed Block Diagram
    1.     B.1 Detailed Block Diagram
  11.   C Glossary
  12.   Revision History

6.2.7 Register 6: Temp ADC Control Register (Read/Write, Address Pointer = 00110)

Bit #D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0
Bit NameRFBRFBADC2XADCSISENCENTENARENRV1RV0M1M0G1G0R1R0
POR Value0000000000000000

Bit Descriptions:

RFB:Reserved Factory Bit: Set to zero for proper operation

ADC2X: Temp ADC runs 2x faster (not for internal Temp Sense Mode)

0 = 1x conversion speed (6ms typical, R1, R0 = ‘00’, TEN = ‘0’, AREN = ‘0’)
1 = 2x conversion speed (3ms typical, R1, R0 = ‘00’, TEN = ‘0’, AREN = ‘0’)

ADCS:Start (restart) the Temp ADC (single conversion control if CEN = 0)

0 = No Start/Restart Temp ADC
1 = Start/Restart Temp ADC (each write of a ‘1’ causes single conversion; when conversion is completed ADCS = ‘0’)

ISEN:TEMPIN Current source (ITEMP) Enable

1 = Enable 7µA current source, ITEMP
0 = Disable 7µA current source, ITEMP

CEN:Enable Temp ADC Continuous Conversion Mode

1 = Continuous Conversion mode
0 = Noncontinuous Conversion mode

TEN:Internal Temperature Mode Enable

1 = Enable Internal Temperature Mode
0 = External Signal Mode

For TEN = 1, set the following bits as shown:
ADC2X = 0
ADCS = set as desired
CEN = set as desired
AREN = 0
RV[1:0] = 00
M[1:0] = 00
G[1:0] = 00
R[1:0] = Set for desired Temp ADC resolution.

AREN:Temp ADC internal reference enable

1 = Enable Temp ADC internal reference (internal reference is 2.048V typical)
0 = Disable Temp ADC internal reference (use external ADC reference; see RV[1:0])

RV[1:0]: Temp ADC External Reference Select (VSA, VEXC, VREF)

M[1:0]:Temp ADC Input Mux Select

G[1:0]:Temp ADC PGA Gain Select (x1, 2, 4, or 8)

R[1:0]:Temp ADC Resolution (Conversion time) Select

Table 6-14 Temp ADC Reference Select
AREN
[8]		RV1
[7]		RV0
[6]		Temp ADC Reference
(VREFT)
000VREF
001VEXC
010VSA
011Factory Reserved
1XXTemp ADC Internal REF (2.048V)
Table 6-15 Temp ADC Input Mux Select
M1
[5]		M0
[4]		Temp ADC PGA +InputTemp ADC PGA −Input
00TEMPINGNDA
01VEXCTEMPIN
10VOUTGNDA
11VREFTEMPIN
Table 6-16 Temp ADC PGA Gain Select
G1
[3]		G0
[2]		Temp ADC PGA Gain
001
012
104
118
GUID-1F1370BF-1A8D-4A8D-A563-57ACE2ADC141-low.gifFigure 6-3 Internal Temperature Mode (Register 6 [9] = ‘1’)
GUID-8EEA7932-1547-44EC-8A60-AEC3681A821B-low.gifFigure 6-4 External Signal Mode (Register 6 [9], TEN = ‘0’)
GUID-E752727A-1A3F-4904-B9F7-A511D0BC6FE8-low.gifFigure 6-5 Temp ADC Mux Configurations
Table 6-17 Temp ADC—Resolution (Conversion Time) Select
R1
[1]		R0
[0]		Internal
Temperature Mode
[TEN = 1]		External Signal Mode [TEN = 0],
External Reference [AREN = 0]		External Signal Mode [TEN = 0],
Internal Reference [2.048V, AREN = 1]
009-Bit + Sign, 0.5°C, (3ms)11-Bit + Sign (6ms)11-Bit + Sign (8 ms)
0110-Bit + Sign, 0.25°C, (6ms)13-Bit + Sign (24ms)13-Bit + Sign (32ms)
1011-Bit + Sign, 0.125°C, (12ms)14-Bit + Sign (50 ms)14-Bit + Sign (64 ms)
1112-Bit + Sign, 0.0625°C, (24ms)15-Bit + Sign (100 ms)15-Bit + Sign (128 ms)