SCES639F January   2007  – September 2025 TXB0101

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specification
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics (DRY)
    6. 5.6  Electrical Characteristics (Other Packages)
    7. 5.7  Timing Requirements, VCCA = 1.2V
    8. 5.8  Timing Requirements, VCCA = 1.5V ± 0.1V
    9. 5.9  Timing Requirements, VCCA = 1.8V ± 0.15V
    10. 5.10 Timing Requirements, VCCA = 2.5V ± 0.2V
    11. 5.11 Timing Requirements, VCCA = 3.3V ± 0.3V
    12. 5.12 Switching Characteristics, VCCA = 1.2V (DRY)
    13. 5.13 Switching Characteristics, VCCA = 1.2V (Other Packages)
    14. 5.14 Switching Characteristics, VCCA = 1.5V ± 0.1V (DRY)
    15. 5.15 Switching Characteristics, VCCA = 1.5V ± 0.1V (Other Packages)
    16. 5.16 Switching Characteristics, VCCA = 1.8V ± 0.15V (DRY)
    17. 5.17 Switching Characteristics, VCCA = 1.8V ± 0.15V (Other Packages)
    18. 5.18 Switching Characteristics, VCCA = 2.5V ± 0.2V (DRY)
    19. 5.19 Switching Characteristics, VCCA = 2.5V ± 0.2V (Other Packages)
    20. 5.20 Switching Characteristics, VCCA = 3.3V ± 0.3V (DRY)
    21. 5.21 Switching Characteristics, VCCA = 3.3V ± 0.3V (Other Packages)
    22. 5.22 Operating Characteristics
    23. 5.23 Typical Characteristics
  7.   Parameter Measurement Information
  8. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Architecture
      2. 6.3.2 Power Up
      3. 6.3.3 Enable and Disable
      4. 6.3.4 Pullup or Pulldown Resistors on I/O Lines
    4. 6.4 Device Functional Modes
  9. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Input Driver Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  11. Revision History
  12. 10Mechanical, Packaging, and Orderable Information

Description

This 1-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2V to 3.6V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65V to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, and 5V voltage nodes. VCCA should not exceed VCCB.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Package Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
TXB0101SOT-23 (DBV) (6)2.90mm × 1.60mm
SC70 (DCK) (6)2.00mm × 1.25mm
SOT (DRL) (6)1.60mm × 1.20mm
DSBGA (YZP) (6)0.90mm × 1.40mm
USON (DRY) (6)1.45mm × 1.00mm
For all available packages, see the orderable addendum at the end of the data sheet.
TXB0101 Typical Operating CircuitTypical Operating Circuit