SDAA104 September 2025 F29H850TU , F29H859TU-Q1
When the application is not able to clear the error before a NMIWD (High Priority Watchdog) timeout, then a reset is triggered from ESM CPU1 instance. In this case, bootROM which runs after the device reset (XRSn) clears errors to avoid a back-to-back NMIWD rest loop and stores the error information and status to M0 RAM (refer to Table below) for further debug.
BootROM clears the following status:
| Description | Address |
|---|---|
| ESM RAW Status | 0x2000_0868 |
| CPU1 PR Error Aggregator High Priority Error address | 0x2000_086C |
|
CPU1 PR Error Aggregator Low Priority Error address |
0x2000_0870 |
| CPU1 PR Error Aggregator Error Type | 0x2000_0874 |
| CPU1 PR Error Aggregator PC value | 0x2000_0878 |
| CPU1 DR1 Error Aggregator High Priority Error address | 0x2000_087C |
|
CPU1 DR1 Error Aggregator Low Priority Error address |
0x2000_0880 |
| CPU1 DR1 Error Aggregator Error Type | 0x2000_0884 |
| CPU1 DR1 Error Aggregator PC value | 0x2000_0888 |
| CPU1 DR2 Error Aggregator High Priority Error address | 0x2000_088C |
|
CPU1 DR2 Error Aggregator Low Priority Error address |
0x2000_0890 |
| CPU1 DR2 Error Aggregator Error Type | 0x2000_0894 |
| CPU1 DR2 Error Aggregator PC value | 0x2000_0898 |
| CPU1 DW Error Aggregator High Priority Error address | 0x2000_089C |
|
CPU1 DW Error Aggregator Low Priority Error address |
0x2000_08A0 |
| CPU1 DW Error Aggregator Error Type | 0x2000_08A4 |
| CPU1 DW Error Aggregator PC value | 0x2000_08A8 |
| CPU1 INT Error Aggregator High Priority Error address | 0x2000_08AC |
|
CPU1 INT Error Aggregator Low Priority Error address |
0x2000_08B0 |
| CPU1 INT Error Aggregator Error Type | 0x2000_08B4 |
| CPU1 INT Error Aggregator PC value | 0x2000_08B8 |