SDAA104 September   2025 F29H850TU , F29H859TU-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Error Handling Architecture Overview
  6. 3Example Overview
  7. 4Error Aggregator Overview
    1. 4.1 Error Aggregation
    2. 4.2 Error Logging
    3. 4.3 Error Debugging Using EAM Module
      1. 4.3.1 EAM Error Debugging
      2. 4.3.2 Interpreting Error Address and Program Counter Values
  8. 5Error Signaling Module Overview
    1. 5.1 ESM Error Event Output Configuration and Status Information
      1. 5.1.1 Sysconfig ESM Configuration
    2. 5.2 ESM Error Events Debugging
    3. 5.3 Miscellaneous Debug Tips for ESM
  9. 6BootROM EAM and ESM Error Status
  10. 7FAQ's:
  11. 8Summary
  12. 9References

5.3 Miscellaneous Debug Tips for ESM

  1. Check RESC (Reset Cause) register to verify if the ESM High Priority Watchdog Interrupt (NMIWD) caused NMIWDRSn to occur. If System ESM is configured for Critical Priority Interrupt output for any error event check ESMRESET bit in RESC register.
  2. Check ESM HI_PRI Register which shows the highest priority outstanding high priority interrupt. The lowest event number has the highest priority, value of 0xFFFF indicates that there are no high priority interrupts active/pending.
  3. Check ESM LOW_PRI Register which shows highest priority outstanding low priority interrupt. The lowest event number has the highest priority, value of 0xFFFF indicates that there are no low priority interrupts active/pending.