SDAA104 September   2025 F29H850TU , F29H859TU-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Error Handling Architecture Overview
  6. 3Example Overview
  7. 4Error Aggregator Overview
    1. 4.1 Error Aggregation
    2. 4.2 Error Logging
    3. 4.3 Error Debugging Using EAM Module
      1. 4.3.1 EAM Error Debugging
      2. 4.3.2 Interpreting Error Address and Program Counter Values
  8. 5Error Signaling Module Overview
    1. 5.1 ESM Error Event Output Configuration and Status Information
      1. 5.1.1 Sysconfig ESM Configuration
    2. 5.2 ESM Error Events Debugging
    3. 5.3 Miscellaneous Debug Tips for ESM
  9. 6BootROM EAM and ESM Error Status
  10. 7FAQ's:
  11. 8Summary
  12. 9References

1 Introduction

For functional safety critical development, manage both systematic and random faults. F29x device architecture has built-in hardware safety mechanisms that provides systematic management for all the error events across the device. To begin, understand the error handling architecture at high level and then deep dive on how to interpret the error logs and configure response for each error event.

This application note first provides an overview of the error handling architecture, then explains the EAM and ESM features and tools in detail with an example and concludes with frequently asked questions and error debugging tips.

Table 1-1 lists the terms and abbreviations used in this application note.

Table 1-1 Terms and Abbreviations Used and Their Explanations
Terms or Abbreviations Explanation
Systematic Error Systematic faults result from an inadequacy in the design, development or manufacturing process and typically stem from gaps in the development process. Refer to safety standard like ISO 26262 for more information
Random Error A random error is a hardware fault that occurs unpredictably during a component's operational lifetime. Unlike systematic errors, which are deterministic and result from design flaws, random errors are statistical and are managed through probabilistic analysis.
System Address Each MCU has a unique memory map that defines the address range for each component. A system address is an address that falls within this map and corresponds to a specific resource
EAM Error Aggregator Module
ESM Error Signaling Module
NMI Non-maskable Interrupt
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