The main differences in the FR4xx general-purpose I/O (GPIO) pins are:

• P1 and P2 ports support interrupt inputs in the FR4xx devices, the same as in the F2xx devices. In addition, P1 and P2 interrupts can be used to wake up FR4xx devices from LPMx.5 power modes. In MSP430FR231x devices, P2.2, P2.3, P2.4, and P2.5 do not support interrupts. In MSP430FR211x devices, P1.4, P1.5, P1.6, and P1.7 do not support interrupts. In MSPFR235x devices, P1, P2, P3 and P4 all support interrupts. In MSP430FR267x and FR247x devices, all GPIOs including P1, P2, P3, P4, P5, and P6 support interrupts.
• Peripheral function select in the MSP430FR413x and MSP430FR203x devices uses one register for Port x function selection: PxSEL0. Other FR2xx devices use two registers for Port x function selection: PxSEL0 and PxSEL1. F2xx also uses two registers for Port x function selection: PxSEL and PxSEL2. See the device-specific data sheet for details.
• In F2xx, the high-impedance leakage current is ±50 nA. In FR4xx, this specification is ±20 nA.
• Configuration of digital I/Os after BOR reset

  To prevent cross currents during startup of the device, all port pins are high-impedance with Schmitt triggers and module functions are disabled. To enable the I/O functions after a BOR reset, first configure the ports, and then clear the LOCKLPM5 bit. For details, see the section on configuration after reset in the digital I/O chapter of the MSP430FR4xx and MSP430FR2xx family user's guide.

• Configuration for LPMx.5 power modes

  During LPMx.5 the I/O pin states are held and locked based on the settings before entry to LPMx.5, regardless of the default I/O register settings. Only the pin conditions are retained. All port configuration register settings such as PxDIR, PxREN, PxOUT, PxIES, and PxIE contents are lost and must be reconfigured after exit from LPMx.5. After wake from LPMx.5, the LOCKLPM5 bit can be cleared to release I/O pin conditions and I/O interrupt configuration. For details, see the section on configuration for LPMx.5 low-power modes in the digital I/O chapter of the MSP430FR4xx and MSP430FR2xx family user's guide.

• Configuration of unused port pins

  To prevent a floating input and to reduce power consumption, unused I/O pins should be configured as I/O function, output direction, and left unconnected on the PCB. Alternatively, the integrated pullup or pulldown resistor can be enabled by setting the PxREN bit of the unused pin to prevent a floating input.

• Configuration of unbonded pins

  In the MSP430FR413x and MSP430FR203x MCUs, some pins are not bonded out in packages with fewer pins than the 64-pin PM package. Configure these unbonded pins as unused port pins. See Table 8-1 for the unbonded pins for different MSP430FR413x and MSP430FR203x packages.