The speeds at which signals travel across the board dictates the choice of dielectric. FR-4, or equivalent, usually provides adequate performance for use with LVDS signals. If rise or fall times of TTL/CMOS signals are less than 500ps, empirical results indicate that a material with a dielectric constant near 3.4, such as Rogers™ 4350 or Nelco N4000-13 is better suited. Once the designer chooses the dielectric, there are several parameters pertaining to the board construction that can affect performance. The following set of guidelines were developed experimentally through several designs involving LVDS devices:

• Copper weight: 15g or 1/2oz start, plated to 30g or 1oz
• All exposed circuitry should be solder-plated (60/40) to 7.62μm or 0.0003in (minimum).
• Copper plating should be 25.4μm or 0.001in (minimum) in plated-through-holes.
• Solder mask over bare copper with solder hot-air leveling