SLUSFQ8B December   2024  – June 2025 BQ2969T

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pin Details
        1. 7.3.1.1 Input Sense Voltage, Vx
        2. 7.3.1.2 Output Drive, OUT
        3. 7.3.1.3 Supply Input, VDD
        4. 7.3.1.4 Control / PTC Input Pin, CTL
        5. 7.3.1.5 Regulated Supply Output, REG
      2. 7.3.2 Overvoltage Sensing for OUT
      3. 7.3.3 Regulator Output Voltage
    4. 7.4 Device Functional Modes
      1. 7.4.1 NORMAL Mode
      2. 7.4.2 OVERVOLTAGE Mode
      3. 7.4.3 UNDERVOLTAGE Mode
      4. 7.4.4 CTL / OVERTEMPERATURE Mode
      5. 7.4.5 CUSTOMER TEST MODE
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 CTL for PTC Thermistor Protection
      5. 8.2.5 CTL for External OUT Overdrive
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Application Curves

The scope plots below show the response of the device transitioning among the different states. Figure 8-4 shows the device detecting an overvoltage event and asserting the OUT pin to blow an external fuse after the overvoltage delay period. Figure 8-5 displays the device recovering from the overvoltage event when all cell voltages have fallen below the overvoltage threshold by the required hysteresis level, and the OUT pin deasserting. Figure 8-6 shows the device detecting an undervoltage condition and disabling the REG LDO output after the undervoltage delay period. Figure 8-7 then depicts the device recovering from the undervoltage condition and re-enabling the REG LDO when all cell voltages have risen above the undervoltage threshold by the required hysteresis level.

BQ2969T Overvoltage
            Protection TriggeringFigure 8-4 Overvoltage Protection Triggering
BQ2969T Undervoltage
            Detection to Disable the RegulatorFigure 8-6 Undervoltage Detection to Disable the Regulator
BQ2969T Overvoltage
            Protection RecoveryFigure 8-5 Overvoltage Protection Recovery
BQ2969T Undervoltage
            Recovery to Re-enable the RegulatorFigure 8-7 Undervoltage Recovery to Re-enable the Regulator