SLUSFQ8B December   2024  – June 2025 BQ2969T

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pin Details
        1. 7.3.1.1 Input Sense Voltage, Vx
        2. 7.3.1.2 Output Drive, OUT
        3. 7.3.1.3 Supply Input, VDD
        4. 7.3.1.4 Control / PTC Input Pin, CTL
        5. 7.3.1.5 Regulated Supply Output, REG
      2. 7.3.2 Overvoltage Sensing for OUT
      3. 7.3.3 Regulator Output Voltage
    4. 7.4 Device Functional Modes
      1. 7.4.1 NORMAL Mode
      2. 7.4.2 OVERVOLTAGE Mode
      3. 7.4.3 UNDERVOLTAGE Mode
      4. 7.4.4 CTL / OVERTEMPERATURE Mode
      5. 7.4.5 CUSTOMER TEST MODE
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 CTL for PTC Thermistor Protection
      5. 8.2.5 CTL for External OUT Overdrive
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

CUSTOMER TEST MODE

The Customer Test Mode (CTM) helps to reduce test time for checking the OV Delay Timer parameter once the circuit is implemented into the battery pack. To enter CTM, the VDD pin must be set at least 10V higher than V4 (see Figure 7-4). In this mode, the OV Delay Timer is reduced to approximately 20ms, considerably shorter than the timer delay in normal operation. To exit CTM, reduce the VDD voltage to below V4 + 10V, which causes the device to exit this mode. This reduction in OV Delay Timer also affects the time required to enter CTL / OVERTEMPERATURE mode as well as UNDERVOLTAGE mode.

CAUTION:

Avoid exceeding any Absolute Maximum Voltages on any pins when placing the device into CTM. Also avoid exceeding Absolute Maximum Voltages for the individual cell voltages (V4–V3), (V3–V2), (V2–V1), and (V1–VSS). Stressing the pins beyond the rated limits can cause permanent damage to the device.

Figure 7-4 shows the timing for the Customer Test Mode.

BQ2969T Timing for Customer Test ModeFigure 7-4 Timing for Customer Test Mode

Figure 7-5 shows the measurement for current consumption of the product for VDD and the cell input pins.

BQ2969T Configuration for Integrated Circuit Current Consumption TestFigure 7-5 Configuration for Integrated Circuit Current Consumption Test