SLUSFQ8B December   2024  – June 2025 BQ2969T

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pin Details
        1. 7.3.1.1 Input Sense Voltage, Vx
        2. 7.3.1.2 Output Drive, OUT
        3. 7.3.1.3 Supply Input, VDD
        4. 7.3.1.4 Control / PTC Input Pin, CTL
        5. 7.3.1.5 Regulated Supply Output, REG
      2. 7.3.2 Overvoltage Sensing for OUT
      3. 7.3.3 Regulator Output Voltage
    4. 7.4 Device Functional Modes
      1. 7.4.1 NORMAL Mode
      2. 7.4.2 OVERVOLTAGE Mode
      3. 7.4.3 UNDERVOLTAGE Mode
      4. 7.4.4 CTL / OVERTEMPERATURE Mode
      5. 7.4.5 CUSTOMER TEST MODE
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 CTL for PTC Thermistor Protection
      5. 8.2.5 CTL for External OUT Overdrive
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.4.2 Layout Example

An example circuit layout using the BQ2969T device in a 4-series cell design is described below in Figure 8-11 and Figure 8-12. The design implements the schematic shown in Figure 8-2 and Figure 8-3, and uses a 2-layer circuit card assembly with cell connections on the left edge and pack connections on the right edge of the board.

Care must be taken to place the RC filter components close to the VC pins of the device. Be sure to use a sufficiently wide trace for the NFET source and drain connections to support the maximum current that flows during a fuse blow event.

BQ2969T BQ2969T Two-Layer Board Layout - Top Layer Figure 8-11 BQ2969T Two-Layer Board Layout - Top Layer
BQ2969T BQ2969T Two-Layer Board Layout - Bottom Layer Figure 8-12 BQ2969T Two-Layer Board Layout - Bottom Layer