SLVSGZ9A February   2025  – May 2025 TPS4141-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
    1. 4.1 Pin Functions TPS4141-Q1
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Power Ratings
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Uni-directional Voltage Sensing
      2. 6.3.2 Bi-directional Voltage Sensing
      3. 6.3.3 Bi-directional and Uni-directional Voltage Sensing
      4. 6.3.4 High Voltage Input Range
      5. 6.3.5 Calculating the Output Voltage (VAOUT)
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Divider Ratio Selection
        2. 7.2.2.2 Error Estimation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

Device Functional Modes

Table 6-1 Device Functional Modes
VDD CE(3) VREF(3) DIV1(3) DIV0(3) DIV(3) FUNCTION
Powered Up(1) L X X X VDD current is in OFF state range. Resistor divider and AOUT buffer DISABLED.
H 0 to 3.0V(4) L L 160 Bi-directional voltage sensing. VDD current is in ON state range. Resistor divider and AOUT buffer ENABLED.
L H 320
H L 640
H H 1000
Powered Up(1) H X L Hi-Z 160 Uni-directional voltage sensing. VDD current is in ON state range. Resistor divider and AOUT buffer ENABLED.
H Hi-Z 320
Hi-Z H 640
Hi-Z L or Hi-Z 1000
Powered Down(2) X X X X VDD current is in OFF state range.
VDD ≥ VDD undervoltage rising threshold.
VDD ≤ VDD undervoltage falling threshold.
X: do not care; L: logic low; H: logic high; Hi-Z: high-impedance.
Refer to the High Voltage Input Range section for input ranges supported for a given VREF.