SLVSGZ9A February   2025  – May 2025 TPS4141-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1. 4.1 Pin Functions TPS4141-Q1
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Power Ratings
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Uni-directional Voltage Sensing
      2. 6.3.2 Bi-directional Voltage Sensing
      3. 6.3.3 Bi-directional and Uni-directional Voltage Sensing
      4. 6.3.4 High Voltage Input Range
      5. 6.3.5 Calculating the Output Voltage (VAOUT)
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Divider Ratio Selection
        2. 7.2.2.2 Error Estimation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

5.7 Switching Characteristics

Unless otherwise noted, all minimum/maximum specifications are over recommended operating conditions. All typical values are measured at TJ = 25℃, VVDD = 5V, VCE = 5V, CAOUT = 47nF, RAOUT = 200Ω.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Switching Characteristics
tON CE rising to AOUT settles to 1% of steady state value. VHV = 300V,
DIV = 160,
CE = L → H		 240 µs
tOFF CE falling to AOUT pulled down to HVGND. VHV = 300V,
DIV = 160,
CE = H → L
Measure when AOUT reaches 100mV referenced to HVGND.		 190 µs
tDIV_TOGGLE_STEP Transition time from present DIV setting to next DIV setting to AOUT settles to % of steady state value. VHV = 300V, VREF = 0V or 2V.
DIV = 160→320, DIV = 320→160 or
DIV = 320→640, DIV = 640→320 or
DIV = 640→1000, DIV = 1000→640.
Settles within 0.25% of steady state value.
 		 70 µs
tDIV_TOGGLE Transition time from lowest DIV setting to highest DIV setting to AOUT settles to % of steady state value.
 		 VHV = 300V, VREF = 0V or 2V.
DIV = 160→1000, DIV = 1000→160.
Settles within 0.25% of steady state value.
 		 27 µs