SLVSIO8 September   2026 TPS638221

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Scheme
        1. 7.3.1.1 Buck Operation
        2. 7.3.1.2 Boost Operation
        3. 7.3.1.3 Buck-Boost Operation
      2. 7.3.2 Operation Mode
        1. 7.3.2.1 PFM Operation
        2. 7.3.2.2 Forced-PWM Operation (FPWM)
        3. 7.3.2.3 Ultra-sonic Mode Operation
      3. 7.3.3 Undervoltage Lockout (UVLO)
      4. 7.3.4 Enable and Soft Start
      5. 7.3.5 Protection Functions
        1. 7.3.5.1 Input Voltage Protection (IVP)
        2. 7.3.5.2 Output Voltage Protection (OVP)
        3. 7.3.5.3 Current Limit Mode and Overcurrent Protection
        4. 7.3.5.4 Output Short Circuit Protection (Hiccup)
        5. 7.3.5.5 Thermal Shutdown
      6. 7.3.6 Power Good
      7. 7.3.7 Load Disconnect
      8. 7.3.8 Output Discharge
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 3.3V Output Power Supply
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Output Capacitor Selection
          3. 8.2.1.2.3 Input Capacitor Selection
          4. 8.2.1.2.4 Setting the Output Voltage
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Export Control Notice
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1.     67

Power Good

The device has a power-good function which indicates if the output of the DC/DC converter is in regulation or not. The device detects a power-good condition when the output voltage is greater than 95% of its nominal value and detects a power-not-good condition when the output voltage is less than 90% of its nominal value.

When a power-not-good condition occurs, the device sets the PG pin to logic low.

The PG signal is valid after a delay of 250µs (typ), when the voltage at the VIN pin is above the UVLO rising and the EN pin is pulled logic high, and the device remains active.