SNIS237A December 2024 – April 2025 TMP118
PRODUCTION DATA
The physical I2C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines must be connected to a supply through an external pullup resistor (unless integrated within the controller). The size of the pullup resistor is determined by the amount of capacitance on the I2C lines, the pullup bus voltage, and the communication frequency. For further details, see the I2C Pullup Resistor Calculation application note. Data transfer can be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition.
I2C communication with this device is initiated by the controller sending a START condition and terminated by the controller sending a STOP condition. A high-to-low transition on the SDA line while the SCL is high defines a START condition. A low-to-high transition on the SDA line while the SCL is high defines a STOP condition.
A repeated START condition is similar to a START condition and is used in place of a back-to-back STOP then START condition. A repeated START condition looks identical to a START condition, but differs from a START condition because the condition occurs without a STOP condition (when the bus is not idle).
Figure 7-13 Definition of Start and Stop
ConditionsOne data bit is transferred during each clock pulse of the SCL. One byte is comprised of eight bits on the SDA line. A byte can either be a device address, register pointer, or data written to or read from a target. Data is transferred Most Significant Bit (MSB) first. 2 bytes of data can be transferred from the controller to target between the START and STOP conditions. Data on the SDA line must remain stable during the high phase of the clock period, as changes in the data line when the SCL is high are interpreted as control commands (START or STOP).
Figure 7-14 One Byte of Data
Transfer