SNLA239D May 2021 – April 2025 DP83867CR , DP83867CS , DP83867E , DP83867IR , DP83867IS , DP83869HM
Configure PHY to Test Mode 1 for the following tests by setting MDIO registers according to 1000 Base Test Mode 1 in Appendix B.
Figure 2-2 IEEE Test Mode 1
per Standard