SNLA452 August 2025 DP83TD510E
If register reads or writes are successful, this section can be skipped.
If register reads or writes are unsuccessful, probe the MDC pin (pin 12) to verify that there is a ≤1.75MHz clock signal being sourced from the Host Controller. Since this is a lower speed device, at 10Mbps, the supported MDC Clock rate is also lower. Also make sure that the MDIO pin has a external pull-up resistor 2.2kΩ - 4.0kΩ. Additionally, the MDIO signal (pin 11) can be decoded using a Logic Analyzer.
Figure 2-2 MDC/MDIO SignalingThe signal ib Figure 2-2 shows a simple read command for register 0x3, which contains the device model number, and must always read as 0x0181 for the DP83TD510.
Note, to access registers beyond 0x1F, the extended register access procedure must be followed, which is given in section 6.3.10 of the data sheet..