SPRACF2A April   2018  – January 2026 AM3351 , AM3352 , AM3354 , AM3356 , AM3357 , AM3358 , AM3359 , AM4372 , AM4376 , AM4377 , AM4378 , AM4379 , AM5706 , AM5708 , AM5716 , AM5718 , AM5726 , AM5728 , AM5729 , AM5746 , AM5748 , AM5749

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Ethernet Redundancy in Smart Grid Substations
    1. 1.1 High Availability Seamless Redundancy (HSR)
    2. 1.2 Parallel Redundancy Protocol (PRP)
  5. 2HSR/PRP Implementation in Sitara Processors
    1. 2.1 PRU_ICSSG Overview
    2. 2.2 PRU_ICSSG HSR/PRP Architecture
    3. 2.3 PRU_ICSSG HSR/PRP Features
    4. 2.4 PRU_ICSSG HSR/PRP Firmware
    5. 2.5 Benefits of PRU_ICSSG HSR/PRP
    6. 2.6 Linux HSR/PRP Solution
    7. 2.7 RTOS HSR/PRP Solution
  6. 3HSR/PRP SDK Support
  7. 4Summary
  8. 5References
  9. 6Revision History

6 Revision History

Changes from Revision * (April 2018) to Revision A (January 2026)

  • Included PRU-ICSSG Overview sectionGo
  • Updated figures to reflect current technology supportGo
  • Added information on AM64x and AM243x processors supporting HSR/PRP on the PRU-ICSSG subsystem supporting 1Gbps bandwidthGo
  • Expanded on the HSR/PRP Linux and RTOS support sections.Go
  • Added PRU-ICSSG HSR/PRP Benefits section highlighting the value of our offloading technologyGo
  • Updated HSR/PRP support section to include AM64x and AM243x families in addition to AM3x/AM4x microprocessors.Go