SPRACS8 May   2022 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S

 

  1.   Trademarks
  2. 1Introduction
  3. 2Hardware Connection
  4. 3C2000 I2C Source Code
    1. 3.1 I2CHandle Description
    2. 3.2 I2CBusScan
    3. 3.3 I2C_MasterTransmitter
    4. 3.4 I2C_MasterReceiver
  5. 4EEPROM Byte Write
  6. 5EEPROM Byte Read
  7. 6EEPROM Word Write
  8. 7EEPROM Word Read
  9. 8EEPROM Paged Write
  10. 9EEPROM Paged Read

1 Introduction

The C28x-I2C module used in the application note has the following features:

  • Compliance with the NXP Semiconductors I2C bus specification (version 2.1):
    • Support for 8-bit format transfers
    • 7-bit and 10-bit addressing modes
    • General call
    • START byte mode
    • Support for multiple master-transmitters and slave-receivers
    • Support for multiple slave-transmitters and master-receivers
    • Combined master transmit/receive and receive/transmit mode
    • Data transfer rate from 10 kbps up to 400 kbps (Fast-mode)
  • Receive FIFO and Transmitter FIFO (16-deep x 8-bit FIFO)
  • Supports two ePIE interrupts:
    • I2Cx Interrupt – Any of the below events can be configured to generate an I2Cx interrupt:
      • Transmit-data ready
      • Receive-data ready
      • Register-access ready
      • No-acknowledgment received
      • Arbitration lost
      • Stop condition detected
      • Addressed as slave
    • I2Cx_FIFO interrupts:
      • Transmit FIFO interrupt
      • Receive FIFO interrupt
  • Module enable/disable capability
  • Free data format mode