SPRAD57 August   2022 TDA4VM

 

  1.   Abstract
  2.   Trademarks
  3. 1Jacinto™ 7 Safety Architecture Concepts
    1. 1.1 Safety Architectural Overview: MCU Island and Extended MCU Island
    2. 1.2 Implementing Mixed Criticality - Freedom from Interference (FFI)
  4. 2Overview of Safety Mechanisms
  5. 3Implementation of Safety in Your System
    1. 3.1 Hardware Collateral
    2. 3.2 Software Support

Jacinto™ 7 Safety Architecture Concepts

For a full architectural overview of the Jacinto devices please review the device technical reference manual of the respective SoC. Jacinto 7 SoCs target mixed criticality with a heterogenous architecture and are scalable in terms performance, peripheral, and functional safety requirements. Each device within the Jacinto family will have a slightly different partitioning of safety components as well as safety targets, this is summarized within Table 1-1.

Table 1-1 Safety Scalability Table
Main Domain MCU Domain Extended MCU Island Total ASIL-D/SIL-3 DMIPs
DRA829/TDA4VM ASIL-B/SIL-2 ASIL-D/SIL-3 N/A Up to 2K
DRA821 ASIL-B/SIL-2 ASIL-D/SIL-3 ASIL-D/SIL-3 Up to 4K
GUID-7DD9C62D-2636-4C62-8484-796E08A5E03B-low.png Figure 1-1 DRA821 Device