TIDUFF0 December   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 AWR2188
      2. 2.3.2 DS90UB971S-Q1
      3. 2.3.3 MSPM0G3519-Q1
      4. 2.3.4 LM68635-Q1
      5. 2.3.5 LP8772x-Q1
      6. 2.3.6 TPS6285018A-Q1
      7. 2.3.7 CDC6C025000-Q1
  9. 3System Design Theory
    1. 3.1 Diagnostic and Monitoring Features
    2. 3.2 Power over Coax (PoC) Network
    3. 3.3 SPI and I2C Communication Interface
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
      1. 4.3.1 Precautions
      2. 4.3.2 Data Capturing Approach
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Launch on Package (LOP Antenna)
        2. 5.1.3.2 Power over Coax (PoC)
        3. 5.1.3.3 PCB Layer Stackup
        4. 5.1.3.4 Board Photos
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
      1. 5.5.1 About the Author
  12. 6About the Author

3 System Design Theory

The streaming radar design requires a high-performance processor as well as deserializer to retrieve and to process the radar data on the central compute unit. When powered through PoC, both data and power supply are provided through a single coax cable.

TIDA-020093 Central Compute Unit and Radar Module System Diagram Figure 3-1 Central Compute Unit and Radar Module System Diagram