TIDUFF0 December   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 AWR2188
      2. 2.3.2 DS90UB971S-Q1
      3. 2.3.3 MSPM0G3519-Q1
      4. 2.3.4 LM68635-Q1
      5. 2.3.5 LP8772x-Q1
      6. 2.3.6 TPS6285018A-Q1
      7. 2.3.7 CDC6C025000-Q1
  9. 3System Design Theory
    1. 3.1 Diagnostic and Monitoring Features
    2. 3.2 Power over Coax (PoC) Network
    3. 3.3 SPI and I2C Communication Interface
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
      1. 4.3.1 Precautions
      2. 4.3.2 Data Capturing Approach
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Launch on Package (LOP Antenna)
        2. 5.1.3.2 Power over Coax (PoC)
        3. 5.1.3.3 PCB Layer Stackup
        4. 5.1.3.4 Board Photos
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
      1. 5.5.1 About the Author
  12. 6About the Author

PCB Layer Stackup

The following information are PCB layer stackup recommendations. Because the target application is automotive, there are a few extra measures and considerations to take, especially when dealing with high-speed signals and small PCBs:

  • Use at least a four-layer board with a power and ground plane. Locate LVCMOS signals away from the differential lines to prevent coupling from the LVCMOS lines to the differential lines
  • If using a four-layer board, layer 2 must be a ground plane. Because most of the components and switching currents are on the top layer, this reduces the inductive effect of the vias when currents are returned through the plane.
  • Two additional layers are used in this board to simplify BGA fan out and routing. Figure 5-2 shows the stackup used in this six-layer board:
TIDA-020093 PCB Layer StackupFigure 5-2 PCB Layer Stackup