TIDUFG5 December   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Insulation Monitoring
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 TIDA-010985 Overview
      2. 2.2.2 Solving for the Unknown Isolation Resistances
      3. 2.2.3 Addressing Large Time Constant Cases
      4. 2.2.4 Prediction Algorithms
      5. 2.2.5 Understanding Error Sources
    3. 2.3 Highlighted Products
      1. 2.3.1 LP-MSPM0G3507
      2. 2.3.2 TPSI2240-Q1
      3. 2.3.3 RES60A-Q1
      4. 2.3.4 TLV9002-Q1
      5. 2.3.5 TPSM33620-Q1
      6. 2.3.6 TPS7A2033
      7. 2.3.7 ISOW1044
      8. 2.3.8 TSM24CA
      9. 2.3.9 TLV431B
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software
    3. 3.3 Test Setup
      1. 3.3.1 Hardware Test Setup
      2. 3.3.2 Software Test Setup
    4. 3.4 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Layout Prints
    2. 4.2 Tools and Software [Required Topic]
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Authors

2.2.2 Solving for the Unknown Isolation Resistances

Two switches enable multiple resistive bridge test ratios using RsP, RsN, and R1. This configuration provides detection capability for any given RisoP to RisoN ratio. The system detects both asymmetric and symmetric faults. Table 2-1 shows the possible switching states for TIDA-010985 and corresponding equations. Only two switching states (except D) are required to solve for RisoP and RisoN. Two equations solve for two unknowns.

Table 2-1 All Possible Switching States for TIDA-010985
STATE SW1 SW2 RsP:RsN RATIO STEADY STATE EQUATION
A ON OFF 7:5
V p V n = - R i s o P | | ( 7 R ) R i s o N | | ( 5 R )
B OFF ON 5:7
V p V n = - R i s o P | | ( 5 R ) R i s o N | | ( 7 R )
C ON ON 5:5
V p V n = - R i s o P | | ( 5 R ) R i s o N | | ( 5 R )
D OFF OFF N/A N/A

In theory, designers can choose any two combinations of A, B, and C switching states. This reference design uses switching states A and B to solve for the isolation resistances. This AB combination maximizes the signal to noise ratio (SNR) by generating the greatest voltage difference between the switching states while limiting voltage variation under IEC requirements. With this selection, the two relevant equations are:

Equation 1. V p 1 V n 1 = - R i s o P | | ( 7 R ) R i s o N | | ( 5 R )
Equation 2. V p 2 V n 2 = - R i s o P | | ( 5 R ) R i s o N | | ( 7 R )

where

  • Vp1 is the voltage of first DC+ measurement (Switch state A)
  • Vn1 is the voltage of first DC– measurement (Switch state A)
  • Vp2 is the voltage of second DC+ measurement (Switch state B)
  • Vn2 is the voltage of second DC– measurement (Switch state B)

Using two equations solves for the two unknowns (RisoP and RisoN). MATLAB® helped solve the equations.

% solve for two equations with two unknowns assuming settled voltages
clc
syms rp rn vp1 vp2 vn1 vn2 rs
% change the sign if we're using inverting op amp for the vn sense
eq1 = vp1/vn1 == (rp*7*rs/(rp+7*rs)) / (rn*5*rs/(rn+5*rs));
eq2 = vp2/vn2 == (rp*5*rs/(rp+5*rs)) / (rn*7*rs/(rn+7*rs));
eq3 = rs > 0 & vp1 > 0 & vn1 > 0;
eqns = [eq1, eq2, eq3];
%
[srna, srpa, parametersa, conditionsa] = solve(eqns,[rn, rp],ReturnConditions=true)
%

The calculation for this yields:

Equation 3. R i s o N = - ( 35 × V n 1 × V p 2 - 35 × V n 2 × V p 1 ) × R S ( 7 × V n 1 × V p 2 - 5 × V n 2 × V p 1 + 2 × V p 1 × V p 2 )
Equation 4. R i s o P = - ( 35 × V n 1 × V p 2 - 35 × V n 2 × V p 1 ) × R S ( 2 × V n 1 × V n 2 + 7 × V n 1 × V p 2 - 5 × V n 2 × V p 1 )

Note the RS constant is defined as 100kΩ. If users use a different ratio, the MATLAB script can be modified to solve for the new chosen ratio.

Figure 2-4 shows an example voltage waveform with the AB combination. In this example, each switching state lasts for one second. One IMD measurement cycle takes two seconds since measurement for the two states is required. Vp1 and Vn1 are measured simultaneously within the first second, and Vp2 and Vn2 are measured simultaneously in the following second. Note that simultaneous ADC measurement of Vp and Vn rejects noise disturbances on the HV bus. The Riso answer depends on the difference in ratios of Vp to Vn (not the individual absolute Vp and Vn).

TIDA-010985 Example AB Switch Toggling Mode Waveform Figure 2-4 Example AB Switch Toggling Mode Waveform