TIDUFG5 December   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Insulation Monitoring
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 TIDA-010985 Overview
      2. 2.2.2 Solving for the Unknown Isolation Resistances
      3. 2.2.3 Addressing Large Time Constant Cases
      4. 2.2.4 Prediction Algorithms
      5. 2.2.5 Understanding Error Sources
    3. 2.3 Highlighted Products
      1. 2.3.1 LP-MSPM0G3507
      2. 2.3.2 TPSI2240-Q1
      3. 2.3.3 RES60A-Q1
      4. 2.3.4 TLV9002-Q1
      5. 2.3.5 TPSM33620-Q1
      6. 2.3.6 TPS7A2033
      7. 2.3.7 ISOW1044
      8. 2.3.8 TSM24CA
      9. 2.3.9 TLV431B
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software
    3. 3.3 Test Setup
      1. 3.3.1 Hardware Test Setup
      2. 3.3.2 Software Test Setup
    4. 3.4 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Layout Prints
    2. 4.2 Tools and Software [Required Topic]
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Authors

2.2.3 Addressing Large Time Constant Cases

In the previous example, no significant RC settling time before the ADC measures Vp and Vn is assumed. In some conditions, such as the example in Figure 2-5, the time constant can be quite long. Without a workaround, the system can need to wait for a significant amount of time for the voltage to settle and thus fail to meet the standard response time requirements (for example, UL 2231-2 is 10s).

TIDA-010985 Example Waveforms With Large Time Constant Figure 2-5 Example Waveforms With Large Time Constant

The time constant τ when SW1 is ON and SW2 is OFF:

Equation 5. τ = ( R i s o P | | R i s o N | | R s P + R 1 | | R s N ) × ( C i s o P + C i s o N )

There are a number of ways to address the larger time constant cases (that is, large Y caps in the µF range):

  • Use lower Rsp and Rsn values at the expense of increased power dissipation and leakage current. This approach is often not practical, since higher leakage currents violate standard requirements.
  • Increase the cycle time (for example, from 2s to 3s) to account for the added settling time. This is often not practical with the UL response time limit.
  • Use multiple measurements and an algorithm to predict the final settling voltage. When done correctly, this can help extend the IMD operating range without increasing power and time. This topic is discussed in Section 2.2.4.