TIDUFG5 December   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Insulation Monitoring
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 TIDA-010985 Overview
      2. 2.2.2 Solving for the Unknown Isolation Resistances
      3. 2.2.3 Addressing Large Time Constant Cases
      4. 2.2.4 Prediction Algorithms
      5. 2.2.5 Understanding Error Sources
    3. 2.3 Highlighted Products
      1. 2.3.1 LP-MSPM0G3507
      2. 2.3.2 TPSI2240-Q1
      3. 2.3.3 RES60A-Q1
      4. 2.3.4 TLV9002-Q1
      5. 2.3.5 TPSM33620-Q1
      6. 2.3.6 TPS7A2033
      7. 2.3.7 ISOW1044
      8. 2.3.8 TSM24CA
      9. 2.3.9 TLV431B
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software
    3. 3.3 Test Setup
      1. 3.3.1 Hardware Test Setup
      2. 3.3.2 Software Test Setup
    4. 3.4 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Layout Prints
    2. 4.2 Tools and Software [Required Topic]
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Authors

Prediction Algorithms

When SW2 is ON, the response follows the exponential decay equation:

Equation 6. Vt=Vinf+Voe-tτ

where

  • Vinf is the final settled voltage (t = infinity)
  • Vo is the difference between the initial voltage at time zero, V(t0), and Vinf.

See Figure 2-6 for a better understanding of the concept.

The settling voltage, Vinf, is of specific interest. The three unknowns in this equation are Vinf, τ, and Vo. If the ADC measures three sample voltages at three different times, a system of three equations is created:

Equation 7. Vt0=Vinf+Vo
Equation 8. Vt1=Vinf+Voe-t1τ
Equation 9. Vt2=Vinf+Voe-t2τ

By using t2 = 2 × t1, the calculation for Vinf is heavily simplified:

Equation 10. Vinf=Vt0×Vt2-Vt12Vt0-2Vt1+Vt2
  • Note that only four-function arithmetic is needed to compute the Vinf. Once Vinf is calculated, Vo can be calculated by subtracting Vinf from V(t0).
  • In theory, the location of t0 on the decay curve does not matter as long as t1 and t2 are spaced appropriately relative to each other. Specifically, users must keep the same time difference between the three samples. For longer time constants, the voltage settling curve can be relatively flat for the same cycle time. In noisy conditions, increasing the time spacing between the three samples increases SNR and thus improves the prediction algorithm performance.

The MATLAB script used to solve for the system of equations is:

%% solution for exponential decay
clc
syms vt0 vt1 vt2 vinf v0 x
eq1 = vt0 == vinf+v0;
eq2 = vt1 == vinf+v0×x;
eq3 = vt2 == vinf+v0×x×x;
eq4 = vt0 ~= vt1;
eqns = [eq1, eq2, eq3, eq4];
[vinf, v0, x, para, conditions] = solve(eqns,[vinf, v0, x],ReturnConditions=true)

In the TIDA-010985 default code, the time spacing between the three samples is 330ms. This keeps the total IMD measurement cycle time under 2s while making the fixed-point computation straightforward. To change the default cycle time, users can do one of the following:

  • Change the E1 #define in IMD.c. For example, changing E1 #define from 990 to 600 (ms) decreases the IMD cycle time from about 2s to about 1.2s. The exact time depends on a few milliseconds (ms) of computation (about 2ms) after the data acquisition period. If the user wants to increase the cycle time for some reason, the data buffer "SamplesSize" must be changed accordingly in addition to E1 #define. Without changing the default ADC sampling period, increasing the data buffer can be limited due to available SRAM (32kB total):
#define SamplesSize 2000 // ADC buffer size
#define E1 990 // total time for Riso measurement is 2xE1 in ms 
  • Change the ADC sampling interval by changing the TIMER_0 period in syscfg (for example, from 1ms to 0.5ms). This requires some changes to the rest of the code since the code assumes the default 1ms ADC sampling period.

The time constant is calculated with the following equation:

Equation 11. τ=-VoV'(t0)

For isolation resistance, only Vinf is necessary. For the total system Y cap (CisoP + CisoN), approximate V'(t) at t0 with two adjacent ADC measurements. Then Ciso is:

Equation 12. Ciso=τRisoP||RisoN||RsP+R1||RsN 
TIDA-010985 Example Voltage Decay Curve With ADC Samples Used for Prediction AlgorithmFigure 2-6 Example Voltage Decay Curve With ADC Samples Used for Prediction Algorithm

A similar analysis can be done for the charging curve. The calculation for the final steady state voltage Vinf is:

Equation 13. Vinf=Vt0+Vt02-2×Vt0×Vt1+Vt12-Vt0+2×Vt1-Vt2

The MATLAB script used to solve for the system of equations is:

%% charging solution
clc
syms vt0 vt1 vt2 vi v0 x
eq1 = vt0 == vi;
eq2 = vt1 == vi+ v0×(1-x);
eq3 = vt2 == vi+ v0×(1-x×x);
eq4 = vt0 ~= vt1;
eqns = [eq1, eq2, eq3, eq4];
%
[svi, sv0, sx, para, conditions] = solve(eqns,[vi, v0, x],ReturnConditions=true)

One important consideration is knowing when to apply the prediction algorithm. If the voltage has a fast settling time, avoid using the prediction algorithm. Waiting a little longer in time before solving for Riso or Ciso is more practical. Currently, the software does some basic checks based on the voltage time derivative (normalized by the Vbus voltage) to set a threshold for prediction mode. This method does require some tuning with known loads to provide a reliable operation. These are the possible operating modes in the code:

  • #define SETTLED_MODE
  • #define DECAY_MODE
  • #define CHARGE_MODE
  • #define OUT_OF_RANGE_MODE