12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling analog-to-digital converter (ADC) - aerospace

12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling analog-to-digital converter (ADC) - aerospace



Product details


Sample rate (Max) (MSPS) 1600, 3200 Resolution (Bits) 12 Number of input channels 2, 1 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Input range (Vp-p) 0.8 Power consumption (Typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 58.2 ENOB (Bits) 9.3 SFDR (dB) 67.3 Operating temperature range (C) 25 to 25, -55 to 125 Input buffer Yes open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

CCGA (NAA) 376 781 mm² 27.94 x 27.94 open-in-new Find other High-speed ADCs (>10MSPS)


  • Total Ionizing Dose (TID) to 300 krad(Si)
  • Single Event Latch-up (SEL) > 120 MeV-cm2/mg
  • Wide Temperature Range –55°C to +125°C
  • Low Power Consumption
  • R/W SPI for Extended Control Mode or Simple Pin Control Mode
  • Interleaved Timing Automatic with Manual Skew Adjust
  • Auto-Sync Function for Multi-Chip Systems
  • Time Stamp Feature to Capture External Trigger
  • Test Patterns at Output for System Debug
  • 1:1 Non-Demuxed or 1:2 or 1:4 Parallel Demuxed LVDS Outputs
  • Single 1.9V Power Supply
  • 376 CPGA Hermetic Package
open-in-new Find other High-speed ADCs (>10MSPS)


The ADC12D1600QML is a low power, high performance CMOS analog-to-digital converter that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a Low Sampling Power Saving Mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

The ADC1600QML provides a flexible parallel LVDS interface which has multiple SPI programmable options to facilitate board design and ASIC/FPGA data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and support programmable common mode voltage. The output of each channel is configurable in either 1:1 non-demuxed or 1:2 demuxed modes. If used as a single channel ADC, there is an option for 1:4 demuxing of the output. The product comes in a hermetic 376 CPGA package for harsh environments.

open-in-new Find other High-speed ADCs (>10MSPS)

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 17
Type Title Date
* Datasheet ADC12D1600QML 12-Bit, 3.2/2.0 GSPS RF Sampling ADC datasheet Dec. 17, 2012
* Radiation & reliability report ADC12D1600QML-SP/ADC12D1620QML-SP Single-Event Effects (SEE) Radiation Report Jul. 27, 2020
* Radiation & reliability report ADC12D1600CCMLS TID Report Jan. 17, 2013
Technical articles Keys to quick success using high-speed data converters Oct. 13, 2020
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations May 18, 2020
Application note Single-Event Effects Confidence Interval Calculations Jan. 14, 2020
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing Jun. 17, 2019
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Application note AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G) Feb. 03, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Application note Wide Bandwidth Receiver Implementation by Interleaving Two Giga-Sampling ADCs Dec. 07, 2015
Application note Signal Chain Noise Figure Analysis Oct. 29, 2014
Application note Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs Aug. 06, 2014
Application note AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C) May 01, 2013
Application note From Sample Instant to Data Output: Understanding Latency in the GSPS ADC Dec. 18, 2012
More literature ADC12Dxx00RF Direct RF-Sampling ADC Family May 16, 2012

Design & development

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Hardware development


The ADC1xD1x00QML products are low power, high performance 10b and 12b ADCs with sampling rates up to 1.6 GSPS as a dual channel ADC or 3.2 GSPS in a single channel interleaved mode. These products come in a hermetic 376 column ceramic grid array package (376 CCGA) for harsh environments, such as (...)

Design tools & simulation

SNAM125A.ZIP (43 KB) - IBIS Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
CCGA (NAA) 376 View options

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