CD4059 standard "A" Series types are dividebyN downcounters that can be programmed to divide an input frequency by any number "N" from 3 to 15,999. The output signal is a pulse one clockcycle wide occurring at a rate equal to the input frequency divided by N. This single output has TTL drive capability. The downcounter is preset by means of 16 jam inputs.
The three ModeSelect Inputs Ka, Kb, and Kc determine the modulus ("divideby" number) of the first and last counting sections in accordance with the truth table shown in Table 1. Every time the first (fastest) counting section goes through one cycle, it reduces by 1 the number that has been preset (jammed) into the three decades of the intermediate counting section and into the last counting section, which consists of flipflops that are not needed for operating the first counting section. For example, in the 2 mode, only one flipflop is needed in the first counting section. Therefore the last counting section has three flipflops that can be preset to a maximum count of seven with a place value of thousands. If 10 is desired for the first section, Ka is set 1, Kb to 1, and Kc to 0. Jam Inputs J1, J2, J3, and J4 are used to preset the first counting section and there is no last counting section. The intermediate counting section consists of three cascaded BCD decade ( 10) counters presettable by means of Jam Inputs J5 through J16.
The ModeSelect Inputs permit frequencysynthesizer channel separations of 10, 12.5, 20, 25, or 50 parts. These inputs set the maximum value of N at 9999 (when the first counting section divides by 5 or 10) or 15,999 (when the first counting section divides by 8, 4, or 2).
The three decades of the intermediate counting section can be preset to a binary 15 instead of a binary 9, while their place values are still 1, 10, and 100, multiplied by the number of the N mode. For example in the 8 mode, the number from which countingdown begins can be preset to:
The total of these numbers (2665) times 8 equals 21,320. The first counting section can be preset to 7. Therefore, 21,327 is the maximum possible count in the 8 mode.
The highest count of the various modes is shown in the column entitled Extended Counter Range of Table 1. Control inputs Kb and Kc can be used to initiate and lock the counter in the "master preset" state. In this condition the flipflops in the counter are preset in accordance with the jam inputs and the counter remains in that state as long as Kb and Kc both remain low. The counter begins to count down from the preset state when a counting mode other than the master preset mode is selected.
The counter should always be put in the master preset mode before the 5 mode is selected.
Whenever the master preset mode is used, control signals Kb=0 and Kc=0 must be applied for at least 3 full clock pulses.
After the Master Preset Mode inputs have been changed to one of the modes, the next positivegoing clock transition changes an internal flipflop so that the countdown can begin at the second positivegoing clock transition. Thus, after an MP (Master Preset) mode, there is always one extra count before the output goes high. Fig. 1 illustrates a total count of 3 ( 8 mode). If the Master Preset mode is started two clock cycles or less before an output pulse, the output pulse will appear at the time due. If the Master Preset Mode is not used the counter jumps back to the "JAM" count when the output pulse appears.
A "1" on the Latch Enable input will cause the counter output to remain high once an output pulse occurs, and to remain in the high state until the latch input returns to "0". If the Latch Enable is "0", the output pulse will remain high for only 1 cycle of the clockinput signal.
As illustrated in the sample applications, this device is particularly advantageous in communication digital frequency synthesis (VHF, UHF, FM, AM, etc.) where programmable divideby"N" counters are an integral part of the synthesizer phaselockedloop subsystem. The CD4059A can also be used to perform the synthesizer "Fixed DividebyR" counting function. It is also useful in generalpurpose counters for instrumentation functions such as totalizers, production counters, and "time out" timers.
The CD4059Bseries types are supplied in 24lead dualinline plastic packages (E suffix), and 24lead smalloutline packages (M and M96 suffixes).
Data sheet acquired from Harris Semiconductor.
Part number  Order  Technology Family  VCC (Min) (V)  VCC (Max) (V)  Bits (#)  Voltage (Nom) (V)  F @ nom voltage (Max) (MHz)  ICC @ nom voltage (Max) (mA)  tpd @ nom Voltage (Max) (ns)  IOL (Max) (mA)  IOH (Max) (mA)  Function  Type  Rating  Operating temperature range (C)  Package Group 

CD4059A 

CD4000  3  18  1 
5
10 15 
8  0.03  180  1.5  1.5  Counter  Other  Catalog  55 to 125  SOIC  24 