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Automotive dual-channel MIPI DSI to dual-link Flatlink™ LVDS bridge

SN65DSI85-Q1

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Product details

Parameters

Protocols LVDS, MIPI DSI Speed (Max) (Gbps) 8 Operating temperature range (C) -40 to 105 open-in-new Find other HDMI, DisplayPort & MIPI ICs

Package | Pins | Size

HTQFP (PAP) 64 144 mm² 12 x 12 open-in-new Find other HDMI, DisplayPort & MIPI ICs

Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature
    • Device HBM ESD Classification Level 3A
    • Device CDM ESD Classification Level C6
  • Implements MIPI D-PHY Version 1.00.00 Physical Layer Front-End and Display Serial Interface (DSI) Version 1.02.00
  • Dual-Channel DSI Receiver Configurable for One, Two, Three, or Four D-PHY Data Lanes Per Channel Operating up to 1 Gbps Per Lane
  • Supports 18-bpp and 24-bpp DSI Video Packets with RGB666 and RGB888 Formats
  • Suitable for 60-fps WQXGA 2560 × 1600 Resolution at 18-bpp and 24-bpp Color, and 60 fps (120 fps Equivalent) WUXGA 1920 × 1200 Resolution With 3D Graphics at 24-bpp Color
  • MIPI Front-End Configurable for Single-Channel or Dual-Channel DSI Configurations
  • Output Configurable for Single-Link or Dual-Link LVDS
  • Supports Dual-Channel DSI ODD or EVEN and LEFT or RIGHT Operating Modes
  • Supports Two Single-Channel DSI to Two Single-Link LVDS Operating Mode
  • LVDS Output-Clock Range of 25 MHz to 154 MHz in Dual-Link or Single-Link Mode
  • LVDS Pixel Clock May be Sourced from Free-Running Continuous D-PHY Clock or External Reference Clock (REFCLK)
  • 1.8-V Main VCC Power Supply
  • Low Power Features Include SHUTDOWN Mode, Reduced LVDS Output Voltage Swing, Common Mode, and MIPI Ultra-Low Power State (ULPS) Support
  • LVDS Channel SWAP, LVDS PIN Order Reverse Feature for Ease of PCB Routing
  • Packaged in 64-pin 10 mm × 10 mm HTQFP (PAP) PowerPAD™ IC Package

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Description

The SN65DSI85-Q1 DSI-to-LVDS bridge features a dual-channel MIPI D-PHY receiver front-end
configuration with four lanes per channel operating at 1 Gbps per lane and a maximum input bandwidth of 8 Gbps. The bridge decodes MIPI DSI 18-bpp RGB666 and 24-bpp RGB888 packets and converts the formatted video data-stream to an LVDS output operating at pixel clocks operating from 25 MHz to 154 MHz, offering a dual-link LVDS, single-link LVDS, or two Single-Link LVDS interfaces with four data lanes per link.

The SN65DSI85-Q1 device is well suited for WQXGA (2560 × 1600) at 60 frames per second (fps), as well as 3D Graphics at WUXGA and True HD (1920 × 1080) resolutions at an equivalent 120 fps with up to 24 bits-per-pixel (bpp). Partial line buffering is implemented to accommodate the data stream mismatch between the DSI and LVDS interfaces.

The SN65DSI85-Q1 device is implemented in a small outline 10 mm × 10 mm HTQFP package with a
0.5-mm pitch, and operates across a temperature range from –40°C to 105°C.

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Technical documentation

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Type Title Date
* Datasheet SN65DSI85-Q1 Automotive Dual-Channel MIPI DSI to Dual-Link LVDS Bridge datasheet (Rev. B) Jun. 28, 2018
Application notes Troubleshooting SN65DSI8x - Tips and Tricks Aug. 27, 2018
User guides SN65DSI83, SN65DSI84, and SN65DSI85 EVM User’s Manual and Implementation Guide Nov. 17, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
299
Description
The SN65DSI85Q1EVM is a PCB created to help customers implementing SN65DSI85Q1 in system hardware.  This EVM includes on-board connectors for DSI input and LVDS output signals.  These connectors are for connecting MIPI DPHY compliant DSI source and LVDS panels to the EVM.
Features
  • Plug and play design
  • Two input options for DSI video signal (QSH-type connector and FX-type connector)
  • Two output port options available for the LVDS output signals (QSH-type connector and I-PEX-type connector)
  • I2C interface to configure internal registers
  • Incorporates LED backlight driver circuitry (...)

Design tools & simulation

SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

REFERENCE DESIGNS Download
MIPI® DSI to OLDI/LVDS Bridge for Automotive Infotainment Head Unit Reference Design
TIDA-01453 — This reference design offers two display interface options: an Automotive processor with MIPI® DSI output and an Automotive infotainment video display panel with OpenLDI (OLDI) / LVDS input The reference design provides two variations. Setup one converts the system on chip (SoC) DSI video output (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
HTQFP (PAP) 64 View options

Ordering & quality

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