The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals at rates up to 2 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter.
The outputs of the SN65LVDS100 and SN65LVDT100 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDS101 and SN65LVDT101 are compatible with 3.3-V PECL levels. Both drive differential transmission lines with nominally 100-Ω characteristic impedance.
The SN65LVDT100 and SN65LVDT101 include a 110-Ω differential line termination resistor for less board space, fewer components, and the shortest stub length possible. They do not include the VBB voltage reference found in the SN65LVDS100 and SN65LVDS101. VBB provides a voltage reference of typically 1.35 V below VCC for use in receiving single-ended input signals and is particularly useful with single-ended 3.3-V PECL inputs. When VBB is not used, it should be unconnected or open.
All devices are characterized for operation from –40°C to 85°C.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | SN65LVDx10x Differential Translator/Repeater datasheet (Rev. E) | PDF | HTML | Jul 20, 2015 |
| Application brief | How to Use a 3.3-V LVDS Buffer as a Low-Voltage LVDS Driver | Jan 9, 2019 | ||
| Application note | Signaling Rate vs. Distance for Differential Buffers | Jan 26, 2010 | ||
| Application note | AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) | Oct 17, 2007 | ||
| Application note | DC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML | Feb 19, 2003 | ||
| More literature | HPL EVM Program | Aug 29, 2002 |
For additional terms or required resources, click any title below to view the detail page where available.
The EVM allows evaluation of operation of theSN65LVDS100/101 or SN65CML100 high-speed differential translators/repeaters. Differential input signals (LVDS, LVPECL, CML, etc.) can be applied and the device output can beobserved across on board terminations, or via direct connection to 50-ohm (...)
The EVM allows evaluation of operation of the SN65LVDS100/101 or SN65CML100 high-speed differential translators/repeaters. Differential input signals (LVDS, LVPECL, CML, etc.) can be applied and the device output can be observed across on board terminations, or via direct connection to (...)
The electrical performance of data converters depends on the cleanliness of their supply voltages. Linear regulators (LDOs) are commonly used but have low efficiency and high power loss, which is unsuitable for portable applications.
Using a switch mode power supply (SMPS) instead, such as the (...)
This is a wideband complex-receiver reference design and evaluation platform that is ideally suited for use as a feedback receiver for transmitter digital predistortion. The EVM signal chain is ideal for high intermediate-frequency (IF) complex-feedback applications and contains a complex (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VSSOP (DGK) | 8 | Ultra Librarian |
| SOIC (D) | 8 | Ultra Librarian |
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.