SN74AVCH8T245 8-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs | TI.com

SN74AVCH8T245 (ACTIVE)

8-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs

 

Recommended alternative parts

  • SN74AXCH8T245  -  Pin compatible new release 8-bit bus hold voltage translator

Description

The SN74AVCH8T245 is an 8-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH8T245 is designed for asynchronous communication between data buses. The device transmits data from either the A bus to the B bus, or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCH8T245 is designed so that the control pins (DIR and OE) are referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device.

The VCC isolation feature ensures that if either VCCA or VCCB is at GND, then the outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

The SN74AVCH8T245 solution is compatible with a single-supply system and can be replaced later with a ’245 function, with minimal printed circuit board redesign.

To ensure the high-impedance state during power up or power down, OE shall be tied to VCCA through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Features

  • Control Inputs (DIR and OE) VIH and VIL Levels Are Referenced to VCCA Voltage
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
  • VCC Isolation Feature
  • Fully Configurable Dual-Rail Design
  • I/Os Are 4.6-V Tolerant
  • Ioff Supports Partial-Power-Down Mode Operation
  • Max Data Rates:
    • 320 Mbps (VCCA ≥ 1.8 V and VCCB ≥ 1.8 V)
    • 170 Mbps (VCCA ≤ 1.8 V or VCCB ≤ 1.8 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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Parametrics Compare all products in Direction controlled voltage translation

 
Technology Family
Application
Bits (#)
High input voltage (Min) (Vih)
High input voltage (Max) (Vih)
Output voltage (Min) (V)
Output voltage (Max) (V)
IOH (Max) (mA)
IOL (Max) (mA)
Package Group
Rating
SN74AVCH8T245 SN74AVC8T245 SN74AVC8T245-Q1 SN74AVCH16T245 SN74AVCH1T45 SN74AVCH20T245 SN74AVCH2T45 SN74AVCH4T245 SN74AXC8T245 SN74AXC8T245-Q1 SN74AXCH8T245 SN74LVC8T245-Q1
AVC     AVC     AVC     AVC     AVC     AVC     AVC     AVC     AXC     AXC     AXC     LVC    
UART
SPI
JTAG
I2S    
UART
SPI
JTAG
I2S    
UART
SPI
JTAG
I2S    
RGMII
SPI
UART
JTAG
I2S    
GPIO
I2S    
RGMII
SPI
UART
JTAG
I2S    
RGMII
SPI
UART
JTAG
I2S    
UART
JTAG
SPI
I2S    
RGMII
SPI
UART
JTAG
I2S    
UART
RGMII
SPI
I2S
JTAG    
RGMII
SPI
UART
JTAG
I2S    
RGMII
SPI
JTAG    
8     8     8     16     1     20     2     4     8     8     8     8    
1.2     0.78     0.78     1     1     0.8     0.8     1.2     0.455     0.455     0.455     1.08    
3.6     3.6     3.6     3.6     3.6     3.6     3.6     3.6     3.6     3.6     3.6     5.5    
1.2     1.2     1.2     1.2     1.2     1.2     1.2     1.2     0.65     0.65     0.65     1.65    
3.6     3.6     3.6     3.6     3.6     3.6     3.6     3.6     3.6     3.6     3.6     5.5    
-12     -12     -12     -12     -12     -12     -12     -12     -12     -12     -12     -32    
12     12     12     12     12     12     12     12