Top
4-bit dual-supply bus transceiver

SN74AXCH4T245

ACTIVE

Product details

Parameters

Technology Family AXC Applications UART, JTAG, SPI Bits (#) 4 High input voltage (Min) (Vih) 0.455 High input voltage (Max) (Vih) 3.6 Output voltage (Min) (V) 0.65 Output voltage (Max) (V) 3.6 IOH (Max) (mA) -12 IOL (Max) (mA) 12 Rating Catalog open-in-new Find other Direction-controlled voltage translators

Package | Pins | Size

TSSOP (PW) 16 22 mm² 5 x 4.4 UQFN (RSV) 16 5 mm² 2.6 x 1.8 open-in-new Find other Direction-controlled voltage translators

Features

  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Bus-hold on data inputs eliminates the need for external pullup or pulldown resistors
  • Operating temperature from –40°C to +125°C
  • Multiple direction control pins to allow simultaneous up and down translation
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V Human-body model
    • 1000-V Charged-device model

All trademarks are the property of their respective owners.

open-in-new Find other Direction-controlled voltage translators

Description

The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.

The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OE and 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.

To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOE pins should be tied to VCCA through a pullup resistor.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

open-in-new Find other Direction-controlled voltage translators
Download
Similar products you might be interested in
open-in-new Compare products
Similar but not functionally equivalent to the compared device:
SN74AVCH24T245 ACTIVE 24-bit dual-supply bus transceiver with configurable voltage translation and 3-state outputs Similar function in 24-channel version

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 5
Type Title Date
* Datasheet SN74AXCH4T245 Four-bit bus transceiver with configurable voltage translation, tri-state outputs, and bus-hold inputs datasheet Nov. 11, 2016
Selection guides Voltage translation buying guide Jun. 13, 2019
Application notes Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. A) Apr. 02, 2019
Application notes Glitch free power sequencing with AXC level translators (Rev. A) Sep. 20, 2018
Application notes An Overview of Bus-Hold Circuit and the Applications (Rev. B) Sep. 17, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARDS Download
document-generic User guide
20
Description
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic and translation devices with included dual supply support
  • Board has 9 sections that can be broken apart for a smaller form factor
EVALUATION BOARDS Download
document-generic User guide
20
Description

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC is (...)

Features
  • SMB connector available for high speed operation
  • Ground port available on each header pin to maintain signal integrity
  • DIR and OE have 10K ohm pull up /pull down resistor options
  • Designed to support up to 20 different devices
EVALUATION BOARDS Download
document-generic User guide
20
Description

This EVM is designed to support SN74AXC8T245 in the RJW package and SN74AXC1T45 in DEA and the DTQ packages. There is also option of populating the SN74AVC4T245 in the RSV package. It is also designed to support the bus hold and Q1 devices for the respective channel counts.

The AXC devices belong to (...)

Features
  • High speed SMB connector available
  • Ground port for each header pin supports high speed measurement
  • DIR and OE pin have the option of 10K ohm resistor pullup or pulldown
  • Layout optimized for high speed connectivity
  • Highlights the Small Package technology of TI
EVALUATION BOARDS Download
document-generic User guide
20
Description
This EVM is designed to support SN74AXC8T245 which is an 8 channel direction-controlled translation device. There is also option of populating 1, 2, 4 channel LVC and AVC direction controlled translation device. It also supports the bus hold and Q1 devices in the same number of channels. The AXC (...)
Features
  • High speed SMB connector available
  • Gnd port for each header pin supports high speed measurement
  • DIR and OE pin have 10K ohm pulldown built in
  • Layout optimized for high speed connectivity
  • Device supports 2 DIR pins each controlling  4 channel bank

Design tools & simulation

SIMULATION MODELS Download
SCEM588.ZIP (28 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
TSSOP (PW) 16 View options
UQFN (RSV) 16 View options

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos

Related videos