Automotive local interconnect network (LIN) Transceiver with integrated voltage regulator



Product details


Protocols LIN, SBC Number of channels (#) 1 Supply voltage (V) 5 to 28 Bus fault voltage (V) -58 to 58 Signaling rate (Max) (Mbps) 0.1 Rating Automotive Operating temperature range (C) -40 to 125 Low power mode Sleep Isolated No open-in-new Find other CAN & LIN transceivers & SBCs

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 open-in-new Find other CAN & LIN transceivers & SBCs


  • AEC-Q100 (Grade 1): Qualified for automotive applications
  • Local interconnect network (LIN) physical layer specification ISO/DIS 17987–4.2 compliant and conforms to SAE J2602 recommended practice for LIN (See SLLA495)
  • Functional Safety-Capable
  • Supports 12-V applications
  • Wide operating ranges
    • ±58 V LIN bus fault protection
    • LDO output supporting 3.3 V or 5 V
    • Sleep mode: ultra-low current
      consumption allows wake up event from:
      • LIN bus or local wake through EN pin
    • Power up and down glitch-free operation
  • Protection features:
    • ESD protection
    • Under-voltage protection on VSUP
    • TXD dominant time out (DTO) protection
    • Thermal-shutdown protection
    • Unpowered node or ground disconnection fail-safe at system level
  • VCC sources up to 70 mA
  • Available in SOIC (8) package

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The TLIN1028S-Q1 is a local interconnect network (LIN) physical layer transceiver, compliant to LIN 2.2A ISO/DIS 17987–4.2 standards, with an integrated low dropout (LDO) voltage regulator.

LIN is a single-wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The LIN receiver supports data rates up to 100 kbps for end-of-line programming. The TLIN1028S-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal. The receiver converts the data stream to logic level signals that are sent to the microprocessor through the open-drain RXD pin. The TLIN1028S-Q1 reduces system complexity by providing a 3.3 V or 5 V rail with up to 70 mA of current to power microprocessors, sensors or other devices. The TLIN1028S-Q1 has an optimized current-limited wave-shaping driver which reduces electromagnetic emissions (EME).

Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or pin. The LIN bus has two states: dominant state (voltage near ground) and recessive state (voltage near battery). In the recessive state, the LIN bus is pulled high by the internal pull-up resistor (45 kΩ) and a series diode. No external pull-up components are required for slave applications. Master applications require an external pull-up resistor (1 kΩ) plus a series diode per the LIN specification.

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Technical documentation

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Type Title Date
* Datasheet TLIN1028S-Q1 Automotive Local Interconnect Network (LIN) Transceiver 70-mA System Basis Chip (SBC) datasheet (Rev. A) May 18, 2020
* Errata TLIN1028S-Q1 Duty Cycle Over VSUP May 22, 2020
Application notes TLIN1028xS-Q1 Functional Safety FIT Rate, Failure Mode Distribution and Pin FMA (Rev. A) Oct. 13, 2020
User guides TLIN1028x EVM User's Guide Apr. 24, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
This EVM can be used to evaluate the TLIN1028x family of devices. The LIN bus is easily accessed via the J6 and J9 connectors, along with VBAT and GND to make easy connections to real LIN systems. All logic signals are available through headers and test points, and modes are easily transitioned (...)
  • Provides access to LIN bus, TXD, and RXD pins
  • Standby and Sleep mode can be easily accessed and transitioned via headers
  • Silkscreen is labeled thoroughly for easy use
  • Test points connected to RESET pin for monitoring
  • RXD Pull-up header to provide voltage for RXD pin

Design tools & simulation

SLLM440.ZIP (73 KB) - IBIS Model
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PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
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TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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CAD/CAE symbols

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SOIC (D) 8 View options

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