TLV320ADC3100

ACTIVE

Product details

Number of ADC channels 2 Analog inputs 2 Digital audio interface DSP, I2S, L, PCM, R, TDM Control interface I2C Sampling rate (Max) (kHz) 96 ADC SNR (Typ) (dB) 92 Rating Catalog
Number of ADC channels 2 Analog inputs 2 Digital audio interface DSP, I2S, L, PCM, R, TDM Control interface I2C Sampling rate (Max) (kHz) 96 ADC SNR (Typ) (dB) 92 Rating Catalog
VQFN (RGE) 24 16 mm² 4 x 4
  • Stereo Audio ADC:
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to 96 kHz
  • Flexible Digital Filtering With Programmable Coefficients and Built-In Processing Blocks:
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Up to 5 Additional Programmable Bi-Quad Filters
    • Programmable High-Pass Filter
  • Four Audio Inputs With Configurable Automatic Gain Control (AGC):
    • Programmable in Single-Ended or Fully Differential Configurations
    • Optionally Tri-Stated for Easy Interoperability With Other Audio Devices
  • Low Power Consumption and Extensive Modular Power Control:
    • 6-mW Mono Record, 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left- and Right-Justified, DSP, PCM, and TDM Modes
  • Power Supplies:
    • Analog: 2.7 V to 3.6 V
    • Digital: Core: 1.65 V to 1.95 V,
      I/O: 1.1 V–3.6 V
  • Package: 4-mm × 4-mm, 24-Pin RGE (VQFN)
  • Stereo Audio ADC:
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to 96 kHz
  • Flexible Digital Filtering With Programmable Coefficients and Built-In Processing Blocks:
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Up to 5 Additional Programmable Bi-Quad Filters
    • Programmable High-Pass Filter
  • Four Audio Inputs With Configurable Automatic Gain Control (AGC):
    • Programmable in Single-Ended or Fully Differential Configurations
    • Optionally Tri-Stated for Easy Interoperability With Other Audio Devices
  • Low Power Consumption and Extensive Modular Power Control:
    • 6-mW Mono Record, 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left- and Right-Justified, DSP, PCM, and TDM Modes
  • Power Supplies:
    • Analog: 2.7 V to 3.6 V
    • Digital: Core: 1.65 V to 1.95 V,
      I/O: 1.1 V–3.6 V
  • Package: 4-mm × 4-mm, 24-Pin RGE (VQFN)

The TLV320ADC3100 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier (PGA) providing up to 40-dB analog gain or automatic gain control (AGC). Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. The TLV320ADC3100 integrates programable channel gain, digital volume control, a phase-locked loop (PLL), programmable biquad filters, and low latency filter modes. Pre-programmed built-in processing blocks (PRBs) that can be chosen based on the specific application needs, allows optimization of performance and power. Low power consumption coupled with its flexibility make the TLV320ADC3100 ideal for battery-powered portable equipment. The TLV320ADC3100 is form-factor and software compatible with the TLV320ADC3101.

The AGC programs to a wide range of attack (7 ms to 1.4 s) and decay (50 ms to 22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency interrupt identification register (IIR) filters optimized for voice and telephony are available, as well as linear-phase finite impulse response (FIR) filters optimized for audio. Programmable IIR filters are also available and can be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, digital signal processor (DSP), pulse code modulation (PCM), and time-division multiplexing (TDM) modes. The audio bus can be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320ADC3100 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier (PGA) providing up to 40-dB analog gain or automatic gain control (AGC). Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. The TLV320ADC3100 integrates programable channel gain, digital volume control, a phase-locked loop (PLL), programmable biquad filters, and low latency filter modes. Pre-programmed built-in processing blocks (PRBs) that can be chosen based on the specific application needs, allows optimization of performance and power. Low power consumption coupled with its flexibility make the TLV320ADC3100 ideal for battery-powered portable equipment. The TLV320ADC3100 is form-factor and software compatible with the TLV320ADC3101.

The AGC programs to a wide range of attack (7 ms to 1.4 s) and decay (50 ms to 22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency interrupt identification register (IIR) filters optimized for voice and telephony are available, as well as linear-phase finite impulse response (FIR) filters optimized for audio. Programmable IIR filters are also available and can be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, digital signal processor (DSP), pulse code modulation (PCM), and time-division multiplexing (TDM) modes. The audio bus can be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

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Technical documentation

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Type Title Date
* Data sheet TLV320ADC3100 Low-Power Stereo ADC for Voice-Activated Systems and Portable Audio datasheet 28 Mar 2018
EVM User's guide TLV320ADC3101EVM-K User's Guide (Rev. A) 24 Sep 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TLV320ADC3101EVM-K — TLV320ADC3101 evaluation module and USB motherboard

The TLV320ADC3101EVM is in the Texas Instruments (TI) modular EVM form factor, which allows direct evaluation of the device performance and operating characteristics and eases software development and system prototyping. The TLV320ADC3101EVM-K is a complete evaluation/demonstration kit, which (...)

Not available on TI.com
Driver or library

TLV320ADC31XX-DRIVERS — TLV320ADC31XX ADC family Linux driver support

These Linux drivers support our low-power audio CODECs in the TLV320AIC2x device family, and include both .c and .h files. The "Go to third party" buttons below will allow you to downlod the appropriate drivers from git.kernal.org.

Linux main line status
Available in Linux main line: Yes
Available (...)
Support software

TLV320ADC310x C Source Headers

SBAC293.ZIP (61 KB)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Calculation tool

Audio CODEC/ADC PLL Calculator

SLAR163.ZIP (487 KB)
Package Pins Download
VQFN (RGE) 24 View options

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