The TPS92662A-Q1 LED matrix manager device enables fully dynamic adaptive lighting
solutions by providing individual pixel-level LED control. The device includes four sub-strings of
three series-connected integrated switches for bypassing individual LEDs. The individual
sub-strings allow the device to accept either single or multiple current sources.
The TPS92662A-Q1 features a programmable Pierce crystal oscillator driver. Optimal
performance is achieved by selecting the driver strength based on the quartz crystal or ceramic
resonator manufacturers recommendations. The device also incorporates a selectable drive strength
clock buffer. The rise and fall times and the EMI generated by clock signal is controlled by
varying the drive strength of the clock buffer. When necessary, the clock buffer can be disabled to
eliminate the noise generated by the clock signal and provide the lowest EMI performance.
The TPS92662A-Q1 supports the multi-drop universal asynchronous receiver transmitter
(UART) serial interface and is compatible with TPS92662-Q1 and TPS92663-Q1 devices. The
I2C communication interface can be used to read from and write to an
external EEPROM that can store system calibration data.
An on-board 8-bit ADC with two multiplexed inputs can be used for system temperature
compensation and used to measure a binning value which allows for LED binning and coding.
The internal charge pump rail supplies the gate drive voltage for the LED bypass
switches. The low on-resistance (RDS(on)) of the bypass switch minimizes
conduction loss and power dissipation.
The TPS92662A-Q1 and TPS92662-Q1 both incorporate identical register settings for
programming phase shift and pulse width of each individual LED in the string and for reporting LED
open and short circuit faults.
The TPS92662A-Q1 LED matrix manager device enables fully dynamic adaptive lighting
solutions by providing individual pixel-level LED control. The device includes four sub-strings of
three series-connected integrated switches for bypassing individual LEDs. The individual
sub-strings allow the device to accept either single or multiple current sources.
The TPS92662A-Q1 features a programmable Pierce crystal oscillator driver. Optimal
performance is achieved by selecting the driver strength based on the quartz crystal or ceramic
resonator manufacturers recommendations. The device also incorporates a selectable drive strength
clock buffer. The rise and fall times and the EMI generated by clock signal is controlled by
varying the drive strength of the clock buffer. When necessary, the clock buffer can be disabled to
eliminate the noise generated by the clock signal and provide the lowest EMI performance.
The TPS92662A-Q1 supports the multi-drop universal asynchronous receiver transmitter
(UART) serial interface and is compatible with TPS92662-Q1 and TPS92663-Q1 devices. The
I2C communication interface can be used to read from and write to an
external EEPROM that can store system calibration data.
An on-board 8-bit ADC with two multiplexed inputs can be used for system temperature
compensation and used to measure a binning value which allows for LED binning and coding.
The internal charge pump rail supplies the gate drive voltage for the LED bypass
switches. The low on-resistance (RDS(on)) of the bypass switch minimizes
conduction loss and power dissipation.
The TPS92662A-Q1 and TPS92662-Q1 both incorporate identical register settings for
programming phase shift and pulse width of each individual LED in the string and for reporting LED
open and short circuit faults.