TS5A22362

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0.65-V, 2:1 (SPDT), 2-channel analog switch with negative signaling capability

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Product details

Parameters

Protocols Analog Audio Configuration 2:1 SPDT Number of channels (#) 2 Bandwidth (MHz) 18.3 Supply voltage (Max) (V) 5.5 Supply voltage (Min) (V) 2.3 Ron (Typ) (Ohms) 0.52 Input/ouput voltage (Min) (V) -3.2 Input/ouput voltage (Max) (V) 5.5 Supply current (Typ) (uA) 0.1 ESD HBM (Typ) (kV) 2.5 Operating temperature range (C) -40 to 85 Crosstalk (dB) -78 ESD CDM (kV) 1.5 ICC (Typ) (uA) 0.2 Input/output continuous current (Max) (mA) 350 COFF (Typ) (pF) 70 CON (Typ) (pF) 370 Off isolation (Typ) (dB) -68 OFF-state leakage current (Max) (µA) 0.375 Ron (Max) (Ohms) 1.3 Ron channel match (Max) (Ohms) 0.15 RON flatness (Typ) (Ohms) 0.076 Turn off time (disable) (Max) (ns) 70 Turn on time (enable) (Max) (ns) 120 VIH (Min) (V) 1.4 VIL (Max) (V) 0.8 open-in-new Find other Protocol-specific switches & muxes

Package | Pins | Size

DSBGA (YZP) 10 3 mm² 1.9 x 1.4 VSON (DRC) 10 9 mm² 3.00 x 3.00 VSON (DRC) 10 9 mm² 3 x 3 VSSOP (DGS) 10 9 mm² 3 x 3 open-in-new Find other Protocol-specific switches & muxes

Features

  • Specified break-before-make switching
  • Negative signaling capability: maximum swing from –2.75 V to 2.75 V (VCC = 2.75 V)
  • Low ON-state resistance (0.65 Ω typical)
  • Low charge injection
  • Excellent ON-state resistance matching
  • 2.3-V to 5.5-V Power supply (VCC)
  • Latch-Up performance exceeds 100 mA Per JESD 78, Class II
  • ESD Performance tested per JESD 22
    • 2500-V Human-body model
      (A114-B, class II)
    • 1500-V Charged-device model (C101)
    • 200-V Machine model (A115-A)
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Description

The TS5A22362 is a bidirectional, 2-channel single-pole double-throw (SPDT) analog switch designed to operate from 2.3 V to 5.5 V. The device features negative signal swing capability that allows signals below ground to pass through the switch without distortion. The break-before-make feature prevents signal distortion during the transferring of a signal from one path to another. Low ON-state resistance, excellent channel-to-channel ON-state resistance matching, and minimal total harmonic distortion (THD) performance are ideal for audio applications. The 3.00 mm × 3.00 mm DRC package is also available as a nonmagnetic package for medical imaging application.

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Technical documentation

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Type Title Date
* Data sheet TS5A22362 0.65-Ω 2-channel SPDT Analog Switches With Negative Signaling Capability datasheet (Rev. E) Sep. 25, 2019
Application note Selecting the Right Texas Instruments Signal Switch (Rev. C) Aug. 06, 2021
Application note Multiplexers and Signal Switches Glossary (Rev. A) Jun. 09, 2021
Application note 1.8 V Logic for Muxes and Signal (Rev. A) Jan. 06, 2021
Application note Preventing Excess Power Consumption on Analog Switches Jul. 03, 2008
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

INTERFACE ADAPTER Download
document-generic User guide
10
Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
  • Quick testing of TI's leaded surface mount packages 
  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 8 most popular leaded packages with a single panel


INTERFACE ADAPTER Download
document-generic User guide
10
Description
The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
Features
  • Quick testing of TI's surface mount packages 
  • Allows suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 16 most popular leadless packages with a single panel

Design tools & simulation

SIMULATION MODEL Download
SCDM120.ZIP (68 KB) - IBIS Model
SIMULATION MODEL Download
SCDM121.ZIP (105 KB) - HSpice Model

CAD/CAE symbols

Package Pins Download
DSBGA (YZP) 10 View options
VSON (DRC) 10 View options
VSSOP (DGS) 10 View options

Ordering & quality

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  • MSL rating/Peak reflow
  • MTBF/FIT estimates
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  • Qualification summary
  • Ongoing reliability monitoring

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