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Product details

Parameters

Number of channels (#) 2 Isolation rating (Vrms) 5700 Power switch MOSFET, IGBT Peak output current (A) 6 DIN V VDE V 0884-10 transient overvoltage rating (Vpk) 8000 DIN V VDE V 0884-10 working voltage (Vpk) 2121 Enable/disable function Disable Output VCC/VDD (Max) (V) 25 Output VCC/VDD (Min) (V) 9.2, 6.5 Input VCC (Min) (V) 3 Input VCC (Max) (V) 18 Prop delay (ns) 19 Operating temperature range (C) -40 to 125 open-in-new Find other Isolated gate drivers

Package | Pins | Size

SOIC (DW) 16 77 mm² 10.3 x 7.5 open-in-new Find other Isolated gate drivers

Features

  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional safety quality-managed
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011

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Description

The UCC21520-Q1 is an isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520-Q1 enables high efficiency, high power density, and robustness.

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The UCC21520-Q1 safety manual and safety fit rate report are available. Request now

Technical documentation

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Type Title Date
* Datasheet UCC21520-Q1, UCC21520A-Q1 4-A, 6-A, 5.7-kVRMS Isolated Dual-Channel Gate Driver for Automotive datasheet (Rev. D) May 12, 2020
Application note External Gate Resistor Selection Guide (Rev. A) Feb. 28, 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) Feb. 28, 2020
More literature VDE certificate for reinforced isolation for DIN VDE V 0884-11:2017-01 (Rev. N) Nov. 13, 2019
More literature CSA Product Certificate (Rev. A) Aug. 15, 2019
More literature UL Certification E181974 Vol 4. Sec 7 (Rev. B) Jul. 22, 2019
User guide Gate Drive Voltage vs. Efficiency Apr. 25, 2019
User guide UCC21520EVM-286, UCC20520EVM- 286, UCC21521CEVM-286, and UCC21530EVM-286 Guide (Rev. B) Nov. 27, 2018
Technical articles How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Technical articles How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical articles Boosting efficiency for your solar inverter designs May 24, 2018
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) May 16, 2018
Technical articles How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018
Application note Reducing Switching Losses in On-Board Chargers for Electric Vehicles Mar. 27, 2018
White paper Cities grow smarter through innovative semiconductor technologies Jul. 07, 2017
White paper Charging stations: Toward an EV support infrastructure May 09, 2017
More literature CQC Product Certificate Nov. 04, 2016
Application note UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) Jul. 05, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
29
Description

UCC21520EVM-286 is designed for evaluating UCC21520DW, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM could be served as a reference design for driving power MOSFETS, IGBTS, and SiC MOSFETS with UCC21520 pin function identification (...)

Features
  • Layout example for using UCC21520 to drive MOSFET, IGBT, SiC up to 1200VDC
  • Peripheral components selection reference
  • Each pin is extended out in PCB layout for pin function identification
  • PCB board cutout facilitates high voltage isolation test between primary side and secondary side
  • Maximized creepage (...)

Design tools & simulation

SIMULATION MODEL Download
SLUM543.ZIP (3 KB) - PSpice Model
SIMULATION MODEL Download
SLUM544.ZIP (59 KB) - PSpice Model
SIMULATION MODEL Download
SLUM551.ZIP (23 KB) - TINA-TI Spice Model
SIMULATION MODEL Download
SLUM552.TSC (168 KB) - TINA-TI Reference Design
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

Reference designs

REFERENCE DESIGNS Download
98.6% Efficiency, 6.6-kW Totem-Pole PFC Reference Design for HEV/EV Onboard Charger
TIDA-01604 — This reference design functions from a base of silicon carbide (SiC) MOSFETs that are driven by a C2000 microcontroller (MCU) with SiC-isolated gate drivers. The design implements three-phase interleaving and operates in continuous conduction mode (CCM) to achieve a 98.46% efficiency at a 240-V (...)
document-generic Schematic

CAD/CAE symbols

Package Pins Download
SOIC (DW) 16 View options

Ordering & quality

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  • Ongoing reliability monitoring

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