Product details

Number of channels (#) 2 Isolation rating (Vrms) 5700 Power switch IGBT, MOSFET Peak output current (A) 6 DIN V VDE V 0884-10 transient overvoltage rating (Vpk) 8000 DIN V VDE V 0884-10 working voltage (Vpk) 2121 Output VCC/VDD (Max) (V) 25 Output VCC/VDD (Min) (V) 9.2, 6.5 Input VCC (Min) (V) 3 Input VCC (Max) (V) 18 Prop delay (ns) 19 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 5, 8
Number of channels (#) 2 Isolation rating (Vrms) 5700 Power switch IGBT, MOSFET Peak output current (A) 6 DIN V VDE V 0884-10 transient overvoltage rating (Vpk) 8000 DIN V VDE V 0884-10 working voltage (Vpk) 2121 Output VCC/VDD (Max) (V) 25 Output VCC/VDD (Min) (V) 9.2, 6.5 Input VCC (Min) (V) 3 Input VCC (Max) (V) 18 Prop delay (ns) 19 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 5, 8
SOIC (DW) 16 77 mm² 10.3 x 7.5
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional safety quality-managed
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional safety quality-managed
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011

The UCC21520-Q1 is an isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520-Q1 enables high efficiency, high power density, and robustness.

The UCC21520-Q1 is an isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520-Q1 enables high efficiency, high power density, and robustness.

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Technical documentation

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Type Title Date
* Data sheet UCC21520-Q1, UCC21520A-Q1 4-A, 6-A, 5.7-kVRMS Isolated Dual-Channel Gate Driver for Automotive datasheet (Rev. D) PDF | HTML 12 May 2020
Certificate UL Certification E181974 Vol 4. Sec 7 (Rev. C) 02 Dec 2022
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. R) 12 Jul 2022
Application note The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 Dec 2021
EVM User's guide Using the UCC21520EVM-286, UCC21521CEVM-286, and UCC21530EVM286 User's Guide (Rev. C) PDF | HTML 21 Oct 2021
More literature Protecting Power Devices in Electric Vehicle Applications 23 Mar 2021
Application note External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
Certificate CSA Product Certificate (Rev. A) 15 Aug 2019
User guide Gate Drive Voltage vs. Efficiency 25 Apr 2019
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 16 May 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018
Application note Reducing Switching Losses in On-Board Chargers for Electric Vehicles 27 Mar 2018
White paper Cities grow smarter through innovative semiconductor technologies 07 Jul 2017
White paper Charging stations: Toward an EV support infrastructure 09 May 2017
Certificate CQC Product Certificate 04 Nov 2016
Application note UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) PDF | HTML 05 Jul 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC21520EVM-286 — UCC21520 4A/6A isolated dual-channel gate driver evaluation module

UCC21520EVM-286 is designed for evaluating UCC21520DW, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM could be served as a reference design for driving power MOSFETS, IGBTS, and SiC MOSFETS with UCC21520 pin function identification, (...)

User guide: PDF | HTML
Not available on TI.com
Simulation model

UCC21520 PSpice Transient Model

SLUM544.ZIP (59 KB) - PSpice Model
Simulation model

UCC21520 TINA-TI Reference Design

SLUM552.TSC (168 KB) - TINA-TI Reference Design
Simulation model

UCC21520 TINA-TI Transient Spice Model

SLUM551.ZIP (23 KB) - TINA-TI Spice Model
Simulation model

UCC21520 Unencrypted PSpice Transient Model

SLUM543.ZIP (3 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

TIDA-01604 — 98.6% Efficiency, 6.6-kW Totem-Pole PFC Reference Design for HEV/EV Onboard Charger

This reference design functions from a base of silicon carbide (SiC) MOSFETs that are driven by a C2000 microcontroller (MCU) with SiC-isolated gate drivers. The design implements three-phase interleaving and operates in continuous conduction mode (CCM) to achieve a 98.46% efficiency at a 240-V (...)
Design guide: PDF
Schematic: PDF
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SOIC (DW) 16 View options

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